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MPC5123YVY400B 数据表(PDF) 72 Page - Freescale Semiconductor, Inc |
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MPC5123YVY400B 数据表(HTML) 72 Page - Freescale Semiconductor, Inc |
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72 / 86 page  MPC5121E/MPC5123 Data Sheet, Rev. 1 Electrical and Thermal Characteristics Freescale Semiconductor 72 Figure 51. Timing Diagram – SPI Slave Mode, Format 1 (CPHA = 1) 3.3.21 GPIOs and Timers The MPC5121e/MPC5123 contains several sets of I/Os that do not require special setup, hold, or valid requirements. The external events (GPIO or timer inputs) are asynchronous to the system clock. The inputs must be valid for at least tIOWID to ensure proper capture by the internal IP clock. 3.3.22 Fusebox Table 49 gives the Fusebox specification. Table 48. GPIO/Timers Input AC Timing Specifications Symbol Description Min Unit SpecID tIOWID GPIO/Timers inputs - minimum pulse witdh 2T1 1 T is the IP bus clock cycle. T= 12 ns is the minimum value (for the maximum IP bus freqency of 83 MHz). ns A21.1 Table 49. Fusebox Characteristics Sym Description Min Max Units SpecID tFUSEWR Program time 1 for Fuse 1 The program length is defined by the value defined in the EPM_PGM_LENGTH bits of the IIM module. 125 — us A22.1 IFUSEWR Program current to program one fuse bit — 10 mA A22.2 SCK (CLKPOL=0) SCK (CLKPOL=1) MOSI Input Input Input SS Input MISO Output 1 22 7 8 3 4 6 5 Preliminary |
类似零件编号 - MPC5123YVY400B |
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类似说明 - MPC5123YVY400B |
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