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MC13213 数据表(PDF) 62 Page - Freescale Semiconductor, Inc |
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MC13213 数据表(HTML) 62 Page - Freescale Semiconductor, Inc |
62 / 70 page MC13211/212/213 Technical Data, Rev. 1.5 62 Freescale Semiconductor 6.4.4 FLASH Specifications This section provides details about program/erase times and program-erase endurance for the FLASH memory. Program and erase operations do not require any special power sources other than the normal VDD supply. Table 21. FLASH Characteristics Characteristic Symbol Min Typical Max Unit Supply voltage for program/erase Vprog/erase 2.1 3.6 V Supply voltage for read operation 0 < fBus < 8 MHz 0 < fBus < 20 MHz VRead 1.8 2.08 3.6 3.6 V Internal FCLK frequency1 1 The frequency of this clock is controlled by a software setting. fFCLK 150 200 kHz Internal FCLK period (1/FCLK) tFcyc 56.67 μs Byte program time (random location)(2) tprog 9tFcyc Byte program time (burst mode)(2) tBurst 4tFcyc Page erase time2 2 These values are hardware state machine controlled. User code does not need to count cycles. This information supplied for calculating approximate time to program and erase. tPage 4000 tFcyc Mass erase time(2) tMass 20,000 tFcyc Program/erase endurance3 TL to TH = –40°C to + 85°C T = 25 °C 3 Typical endurance for FLASH was evaluated for this product family on the 9S12Dx64. For additional information on how Freescale Semiconductor defines typical endurance, please refer to Engineering Bulletin EB619/D, Typical Endurance for Nonvolatile Memory. 10,000 100,000 — — cycles Data retention4 4 Typical data retention values are based on intrinsic capability of the technology measured at high temperature and de-rated to 25 °C using the Arrhenius equation. For additional information on how Freescale Semiconductor defines typical data retention, please refer to Engineering Bulletin EB618/D, Typical Data Retention for Non-volatile Memory. tD_ret 15 100 — years |
类似零件编号 - MC13213 |
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类似说明 - MC13213 |
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