数据搜索系统,热门电子元器件搜索 |
|
MC13211 数据表(PDF) 30 Page - Freescale Semiconductor, Inc |
|
MC13211 数据表(HTML) 30 Page - Freescale Semiconductor, Inc |
30 / 70 page MC13211/212/213 Technical Data, Rev. 1.5 30 Freescale Semiconductor — Uses external or internal clock as reference frequency • Automatic lockout of non-running clock sources • Reset or interrupt on loss of clock or loss of FLL lock • Digitally-controlled oscillator (DCO) preserves previous frequency settings, allowing fast frequency lock when recovering from stop3 mode • DCO will maintain operating frequency during a loss or removal of reference clock. When FLL is engaged (FEE or FEI) loss of lock or loss of clock adds a divide-by-2 to ICG to prevent over-clocking of the system. • Post-FLL divider selects 1 of 8 bus rate divisors (/1 through /128) • Separate self-clocked source for real-time interrupt • Trimmable internal clock source supports SCI communications without additional external components • Automatic FLL engagement after lock is acquired • Selectable low-power/high-gain oscillator modes 5.4.2 Modes of Operation This section provides a high-level description only. • Mode 1 — Off The output clock, ICGOUT, is static. This mode may be entered when the STOP instruction is executed. • Mode 2 — Self-clocked (SCM) Default mode of operation that is entered out of reset. The ICG’s FLL is open loop and the digitally controlled oscillator (DCO) is free running at a frequency set by the filter bits. • Mode 3 — FLL engaged internal (FEI) In this mode, the ICG’s FLL is used to create frequencies that are programmable multiples of the internal reference clock. — FLL engaged internal unlocked is a transition state which occurs while the FLL is attempting to lock. The FLL DCO frequency is off target and the FLL is adjusting the DCO to match the target frequency. — FLL engaged internal locked is a state which occurs when the FLL detects that the DCO is locked to a multiple of the internal reference. • Mode 4 — FLL bypassed external (FBE) In this mode, the ICG is configured to bypass the FLL and use an external clock as the clock source. • Mode 5 — FLL engaged external (FEE) The ICG’s FLL is used to generate frequencies that are programmable multiples of the external clock reference. — FLL engaged external unlocked is a transition state which occurs while the FLL is attempting to lock. The FLL DCO frequency is off target and the FLL is adjusting the DCO to match the target frequency. |
类似零件编号 - MC13211 |
|
类似说明 - MC13211 |
|
|
链接网址 |
隐私政策 |
ALLDATASHEETCN.COM |
ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |