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AD5422BREZ 数据表(PDF) 7 Page - Analog Devices

部件名 AD5422BREZ
功能描述  Single Channel, 12/16-Bit, Serial Input, Current Source & Voltage Output DAC
Download  38 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD5422BREZ 数据表(HTML) 7 Page - Analog Devices

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Preliminary Technical Data
AD5412/AD5422
Rev. PrF | Page 7 of 38
AC PERFORMANCE CHARACTERISTICS
AVDD = 10.8V to 40V, AVSS = -26.4V to -3V/0V, AVDD + |AVSS| < 52.8V, AGND = DGND = 0 V, REFIN= +5 V external;
DVCC = 2.7 V to 5.5 V, VOUT : RL = 1 kΩ, CL = 200 pF, IOUT : RL = 300Ω, HL = 50mH;
all specifications TMIN to TMAX, ±10 V / 0 to 24 mA range unless otherwise noted.
Table 3.
Parameter1
Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE
VOLTAGE OUTPUT
Output Voltage Settling Time
8
µs typ
Full-scale step (10 V) to ±0.03% FSR
10
µs max
5
µs max
512 LSB step settling (16-Bit LSB)
Slew Rate
1
V/µs typ
Power-On Glitch Energy
10
nV-sec typ
Digital-to-Analog Glitch Energy
10
nV-sec typ
Glitch Impulse Peak Amplitude
20
mV typ
Digital Feedthrough
1
nV-sec typ
Output Noise (0.1 Hz to 10 Hz Bandwidth)
0.1
LSB p-p typ
16-Bit LSB
Output Noise (100 kHz Bandwidth)
80
µV rms max
1/f Corner Frequency
1
kHz typ
Output Noise Spectral Density
100
nV/√Hz typ
Measured at 10 kHz
AC PSRR
TBD
dB
200mV 50/60Hz Sinewave
superimposed on power supply voltage.
CURRENT OUTPUT
Output Current Settling Time
TBD
µs typ
To 0.1% FSR , L = 1H
TBD
µs typ
To 0.1% FSR , L < 1mH
AC PSRR
TBD
dB
200mV 50/60Hz Sinewave
superimposed on power supply voltage.
1 Guaranteed by characterization, not production tested.


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