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STK672-740A-E 数据表(PDF) 10 Page - Sanyo Semicon Device |
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STK672-740A-E 数据表(HTML) 10 Page - Sanyo Semicon Device |
10 / 19 page STK672-740A-E No. A1136-10/19 [Configuration of I/O pins] <Configuration of the φA, φAB, φB, φBB, ENABLE, and RESETB input pins> Input pins13, 17, 12, 10, 15, and 14 The input pins of this driver all use Schmitt input. Typical specifications at Tc=25 °C are given below. Hysteresis voltage is 0.3V (VIHa-VILa). Input voltage specifications are as follows. VIH=2.5V min VIL=0.8V max <Configuration of the FAULT input pin> <Configuration of the Vref input pin> The internal impedance, 100k Ω, is designed so that the increase in current is prevented while Pin 19 is open. The recommended Vref voltage is 0.14V or higher because the output offset voltage of Vref/4.9 amplifier cannot be controlled down to 0V 5V VSS 10k Ω 100k Ω VIHa When rising When falling 1.5V typ VILa 1.8V typ Input voltage 5V VSS Vref/4.9 VSS VSS Amplifier 100k Ω - + Output pin Pin 16 Input pin Pin 19 |
类似零件编号 - STK672-740A-E |
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类似说明 - STK672-740A-E |
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