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MCF5234256MAPBGA 数据表(PDF) 7 Page - Freescale Semiconductor, Inc |
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MCF5234256MAPBGA 数据表(HTML) 7 Page - Freescale Semiconductor, Inc |
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7 / 46 page  Signal Descriptions MCF523x Integrated Microprocessor Hardware Specification, Rev. 2 Freescale Semiconductor 7 ECRS — — — I — — —F4 F4 ERXCLK — — — I — — —E3 E3 ERXDV — — — I — — —E4 E4 ERXD[3:0] — — — I — — —D3, D4, C3, C4 D3, D4, C3, C4 ERXER — — — I — — —D5 D5 ETXCLK — — — I — — —C5 C5 ETXEN — — — O — — —D6 D6 ETXER — — — O — — —C6 C6 ETXD[3:0] — — — O — — — B6, B5, A5, B7 B6, B5, A5, B7 Feature Control eTPU/EthENB — — — I —— — — M4 I2C I2C_SDA PFECI2C1 CAN0RX — I/O — J12 L15 L15 L15 I2C_SCL PFECI2C0 CAN0TX — I/O — J11 L14 L14 L14 DMA DACK[2:0] and DREQ[2:0] do not have a dedicated bond pads. Please refer to the following pins for muxing: TS and DT2OUT for DACK2, TSIZ1and DT1OUT for DACK1, TSIZ0 and DT0OUT for DACK0, IRQ2 and DT2IN for DREQ2, TEA and DT1IN for DREQ1, and TIP and DT0IN for DREQ0. — — — — — QSPI QSPI_CS1 PQSPI4 SD_CKE — O 139 B7 B10 B10 B10 QSPI_CS0 PQSPI3 — — O 147 A6 D9 D9 D9 QSPI_CLK PQSPI2 I2C_SCL — O 148 C5 B8 B8 B8 QSPI_DIN PQSPI1 I2C_SDA — I 149 B5 C8 C8 C8 QSPI_DOUT PQSPI0 — — O 150 A5 D8 D8 D8 UARTs U2TXD PUARTH1 CAN1TX — O —A8 D11 D11 D11 U2RXD PUARTH0 CAN1RX — I —A7 D10 D10 D10 U1CTS PUARTL7 U2CTS — I —B8 C11 C11 C11 U1RTS PUARTL6 U2RTS — O —C8 B11 B11 B11 U1TXD PUARTL5 CAN0TX — O 135 D9 A12 A12 A12 Table 2. MCF523x Signal Information and Muxing (continued) Signal Name GPIO Alternate 1 Alternate 2 Dir.1 MCF5232 160 QFP MCF5232 196 MAPBGA MCF5233 256 MAPBGA MCF5234 256 MAPBGA MCF5235 256 MAPBGA |
类似零件编号 - MCF5234256MAPBGA |
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类似说明 - MCF5234256MAPBGA |
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