数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

LC4512V-35T176C 数据表(PDF) 7 Page - Lattice Semiconductor

部件名 LC4512V-35T176C
功能描述  3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
Download  99 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  LATTICE [Lattice Semiconductor]
网页  http://www.latticesemi.com
标志 LATTICE - Lattice Semiconductor

LC4512V-35T176C 数据表(HTML) 7 Page - Lattice Semiconductor

Back Button LC4512V-35T176C Datasheet HTML 3Page - Lattice Semiconductor LC4512V-35T176C Datasheet HTML 4Page - Lattice Semiconductor LC4512V-35T176C Datasheet HTML 5Page - Lattice Semiconductor LC4512V-35T176C Datasheet HTML 6Page - Lattice Semiconductor LC4512V-35T176C Datasheet HTML 7Page - Lattice Semiconductor LC4512V-35T176C Datasheet HTML 8Page - Lattice Semiconductor LC4512V-35T176C Datasheet HTML 9Page - Lattice Semiconductor LC4512V-35T176C Datasheet HTML 10Page - Lattice Semiconductor LC4512V-35T176C Datasheet HTML 11Page - Lattice Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 99 page
background image
Lattice Semiconductor
ispMACH 4000V/B/C/Z Family Data Sheet
7
Table 5. Product Term Expansion Capability
Every time the super cluster allocator is used, there is an incremental delay of tEXP. When the super cluster alloca-
tor is used, all destinations other than the one being steered to, are given the value of ground (i.e., if the super clus-
ter is steered to M (n+4), then M (n) is ground).
Macrocell
The 16 macrocells in the GLB are driven by the 16 outputs from the logic allocator. Each macrocell contains a pro-
grammable XOR gate, a programmable register/latch, along with routing for the logic and control functions.
Figure 5 shows a graphical representation of the macrocell. The macrocells feed the ORP and GRP. A direct input
from the I/O cell allows designers to use the macrocell to construct high-speed input registers. A programmable
delay in this path allows designers to choose between the fastest possible set-up time and zero hold time.
Figure 5. Macrocell
Enhanced Clock Multiplexer
The clock input to the flip-flop can select any of the four block clocks along with the shared PT clock, and true and
complement forms of the optional individual term clock. An 8:1 multiplexer structure is used to select the clock. The
eight sources for the clock multiplexer are as follows:
• Block CLK0
• Block CLK1
Expansion
Chains
Macrocells Associated with Expansion Chain
(with Wrap Around)
Max PT/
Macrocell
Chain-0
M0
→ M4 → M8 → M12 → M0
75
Chain-1
M1
→ M5 → M9 → M13 → M1
80
Chain-2
M2
→ M6 → M10 → M14 → M2
75
Chain-3
M3
→ M7 → M11 → M15 → M3
70
Single PT
Block CLK0
Block CLK1
Block CLK2
Block CLK3
PT Clock (optional)
Shared PT Clock
CE
D/T/L
Q
RP
Shared PT Initialization
PT Initialization/CE (optional)
PT Initialization (optional)
From Logic Allocator
Power-up
Initialization
To ORP
To GRP
From I/O Cell
Delay


类似零件编号 - LC4512V-35T176C

制造商部件名数据表功能描述
logo
Lattice Semiconductor
LC4512V-35T176C LATTICE-LC4512V-35T176C Datasheet
483Kb / 74P
   3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
More results

类似说明 - LC4512V-35T176C

制造商部件名数据表功能描述
logo
Lattice Semiconductor
LC4032C LATTICE-LC4032C Datasheet
483Kb / 74P
   3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LA-ISPMACH4000V LATTICE-LA-ISPMACH4000V Datasheet
240Kb / 42P
   3.3V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4512Z LATTICE-LC4512Z Datasheet
851Kb / 91P
   3.3V/2.5V/1.8V In-System Programmable SuperFAST High density PDLs
2096VL LATTICE-2096VL Datasheet
142Kb / 11P
   2.5V In-System Programmable SuperFAST??High Density PLD
2032VL LATTICE-2032VL Datasheet
156Kb / 12P
   2.5V In-System Programmable SuperFAST??High Density PLD
2128VL LATTICE-2128VL Datasheet
214Kb / 17P
   2.5V In-System Programmable SuperFAST??High Density PLD
2064VL LATTICE-2064VL Datasheet
188Kb / 14P
   2.5V In-System Programmable SuperFAST??High Density PLD
2192VL LATTICE-2192VL Datasheet
164Kb / 13P
   2.5V In-System Programmable SuperFAST??High Density PLD
2096VE LATTICE-2096VE Datasheet
160Kb / 12P
   3.3V In-System Programmable SuperFAST??High Density PLD
2128VE LATTICE-2128VE Datasheet
234Kb / 19P
   3.3V In-System Programmable SuperFAST??High Density PLD
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99


数据表 下载

Go To PDF Page


链接网址




隐私政策
ALLDATASHEETCN.COM
ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com