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LD3985J29R 数据表(PDF) 4 Page - STMicroelectronics |
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LD3985J29R 数据表(HTML) 4 Page - STMicroelectronics |
4 / 22 page Pin configuration LD3985xx 4/22 2 Pin configuration Figure 2. Pin connections (top view for SOT and TSOT, top through view for Flip-chip) Flip-chip SOT23-5L/TSOT23-5L Table 2. Pin description Pin n° for SOT23-5L/ TSOT23-5L Pin n° for Flip-chip Symbol Name and function 14 VI Input voltage of the LDO 2 2 GND Common ground 31 VINH Inhibit input voltage: ON MODE when VINH ≥ 1.2 V, OFF MODE when VINH ≤0.4 V (Do not leave floating, not internally pulled down/up) 4 5 BYPASS Bypass pin: connect an external capacitor (usually 10 nF) to minimize noise voltage 53 VO Output voltage of the LDO |
类似零件编号 - LD3985J29R |
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类似说明 - LD3985J29R |
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