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ST6265BB1 数据表(PDF) 6 Page - STMicroelectronics |
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ST6265BB1 数据表(HTML) 6 Page - STMicroelectronics |
6 / 74 page 6/74 ST62T55B ST62T65B/E65B 1.2 PIN DESCRIPTIONS VDD and VSS. Power is supplied to the MCU via these two pins. VDD is the power connection and VSS is the ground connection. OSCin and OSCout. These pins are internally connected to the on-chip oscillator circuit. A quartz crystal, a ceramic resonator or an external clock signal can be connected between these two pins. The OSCin pin is the input pin, the OSCout pin is the output pin. RESET. The active-low RESET pin is used to re- start the microcontroller. TEST/V PP. The TEST must be held at VSS for nor- mal operation. If TEST pin is connected to a +12.5V level during the reset phase, the EPROM/ OTP programming Mode is entered. NMI. The NMI pin provides the capability for asyn- chronous interruption, by applying an external non maskable interrupt to the MCU. The NMI input is falling edge sensitive.It is provided with an on-chip pullup resistor and Schmitt trigger characteristics. PA0-PA7. These 8 lines are organized as one I/O port (A). Each line may be configured under soft- ware control as inputs with or without internal pull- up resistors, interrupt generating inputs with pull- up resistors, open-drain or push-pull outputs, ana- log inputs for the A/D converter. PB0-PB5. These 6 lines are organized as one I/O port (B). Each line may be configured under soft- ware control as inputs with or without internal pull- up resistors, interrupt generating inputs with pull- up resistors, open-drain or push-pull outputs. PB0-PB5 can also sink 20mA for direct LED driving. PB6/ARTIMin, PB7/ARTIMout. These pins are ei- ther Port B I/O bits or the Input and Output pins of the AR TIMER. To be used as timer input function PB6 has to be programmed as input with or with- out pull-up. A dedicated bit in the AR TIMER Mode Control Register sets PB7 as timer output function. PB6-PB7 can also sink 20mA for direct LED driv- ing. PC0-PC4. These 5 lines are organized as one I/O port (C). Each line may be configured under soft- ware control as input with or without internal pull- up resistor, interrupt generating input with pull-up resistor, analog input for the A/D converter, open- drain or push-pull output. PC1 can also be used as Timer I/O bit while PC2-PC4 can also be used as respectively Data in, Data out and Clock I/O pins for the on-chip SPI to carry the synchronous serial I/O signals. Figure 2. ST62T55B, T65B, E65B Pin Configuration 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 PB0 PB1 VPP/TEST PB2 PB3 Ain / PA0 VDD PB4 PB5 ARTIMin/PB6 PC0/Ain PC1/TIM1/Ain PC2/Sin/Ain PC3/Sout/Ain PC4/Sck/Ain PA7/Ain PA6/Ain PA5/Ain PA4/Ain PA3/Ain 28 27 26 25 24 23 22 21 ARTIMout/PB7 VSS Ain/PA1 Ain/PA2 NMI RESET OSCout OSCin 6 |
类似零件编号 - ST6265BB1 |
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类似说明 - ST6265BB1 |
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