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ST3917AN 数据表(PDF) 7 Page - STMicroelectronics

部件名 ST3917AN
功能描述  SPEECH - TONE/PULSE DIALER - LED INDICATOR
Download  16 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST3917AN 数据表(HTML) 7 Page - STMicroelectronics

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Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
ZDTMF
DTMF Attenuation Pin Impedance
25
32
39
k
GRX
Receive gain (see Figure 11)
VINP = 4mVRMS,
RE = 300
Ω,RGRX=100kΩ
ILN = 15mA
ILN = 60mA
29.5
23.0
31.0
25.0
32.5
27.0
dB
dB
AGRX
Receive Gain Variation (see Figure 11)
VINP = 4mVRMS,
RE = 300
Ω,ILN = 15MA
RGRX = 10K
RGRX = 300k
-20
-20
+10
10
dB
dB
dB
DRX
Receive Distortion (see Figure 11)
ILN = 15mA, RGRX=100k
RE = 150
Ω,VEAR = 0.25VRMS
RE = 300
Ω,VEAR = 0.45VRMS
RE = 450
Ω,VEAR = 0.55VRMS
2
2
2
%
%
%
NRX
Receive Noise (see Figure 11)
ILN = 15mA, RE = 300
RGRX = 100k
Ω,VINP =0V
200
µV
ZOUT
Receive Output Impedance
(see Figure 11)
ILN = 15mA
35
VPT
Pacifier Tone Level on Earphone
(see Figure 11)
ILN = 15mA
RP =
RP = 430k
60
600
mVRMS
mVRMS
TKD
FKS
KRU
KRD
Keyboard Interface
Keypad Debounce Time
Keypad Scan Frequency
Keypad Pullup Resistance
Keypad Pulldown Resistance
See Figures 4 and 5
32
250
100
500
ms
Hz
k
TRIS
TR
TPSD
TISD
TDUR
Tone Mode
Tone Output Rise Time
Tone Signalling Rate
Presignal Delay
Intersignal Delay
Tone Output Duration
See Figures 2 and 3
40
5.55
90
90
5ms
1/sec
ms
ms
ms
TPT
FPT
PR
TB
TM
IDP
PDP
Pulse Mode
Pacifier Tone Duration
Pacifier Tone Frequency
Pulse Rate
Break Time :
ST3917A
ST3917B
Make Time :
ST3917A
ST3917B
Interdigital Pause
Predigital Pause :
ST3917A
ST3917B
See Figures 4 and 5
75
500
10
60
67
40
33
820
50
43
ms
Hz
PPS
ms
ms
ms
ms
ms
ms
ms
Option Selectable
Symbol
Parameter
Option 1
SEL = VDD
Option 2
SEL = GND
Option 3
SEL = ROW
Option 4
SEL = COL
Unit
tFLASH
Timed Hook Flash (see Figures 2 and3)
100
600
300
100
ms
Notes : 1. All inputs unloaded. Quiescent mode (oscillator off).
2. Pulse output sink current for VOUT = 0.5V at VDD = 3V.
3. Pacifier tone sink current for VOUT = 0.5V, source current for VOUT = 2.5V at VDD = 3V.
4. Memory retention voltage is the point where memory is guaranteed but circuit operation is not. Proper memory retention is
guaranteed if either the minimum IMR is provided or the minimum VMR. The design does not have to provide both the minimum
current and voltage.
5. Option 1 is with softswitch inhibition.
ELECTRICAL CHARACTERISTICS (continued)
(ILN = 10mA to 120mA, f = 1kHz, Tamb =25
°C, VDD = 3V ; unless otherwise specified)
ST3917A - ST3917B
7/16


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