11

STK17T88

Jan, 2008

Document Control #ML0024 Rev 2.0

MODE SELECTION

E

W

G

Mode

I/O

Power

Notes

H

X

X

X

Not Selected

Output High Z

Standby

L

H

L

X

Read SRAM

Output Data

Active

L

L

X

X

Write SRAM

Input Data

Active

LH

L

0x0E38

0x31C7

0x03E0

0x3C1F

0x303F

Read SRAM

Read SRAM

Read SRAM

Read SRAM

Read SRAM

Output Data

Output Data

Output Data

Output Data

Output Data

Active

q,r,s

0x0FC0

Nonvolatile Store

Output High Z

LH

L

0x0E38

0x31C7

0x03E0

0x3C1F

0x303F

0x0C63

Read SRAM

Read SRAM

Read SRAM

Read SRAM

Read SRAM

Nonvolatile Recall

Output Data

Output Data

Output Data

Output Data

Output Data

Output High Z

Active

q,r,s

note q: The six consecutive addresses must be in the order listed. W must be high during all six consecutive cycles to enable a nonvolatile

cycle.

note r: While there are 15 addresses on the STK17T88, only the lower 13 are used to control software modes

note s: I/O state depends on the state of G. The I/O table shown assumes G low