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LTC4252-1 Datasheet(数据表) 4 Page - Linear Technology

部件型号  LTC4252-1
说明  Negative Voltage Hot Swap Controllers
下载  36 Pages
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
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LTC4252-1 Datasheet(HTML) 4 Page - Linear Technology

 
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LTC4252-1/LTC4252-2
LTC4252A-1/LTC4252A-2
4
425212fb
ITMR
TIMER Pin Current
Timer On (Initial Cycle/Latchoff/
5.8
5.8
µA
Shutdown Cooling, Sourcing),
VTMR = 2V
Timer Off (Initial Cycle, Sinking),
28
28
mA
VTMR = 2V
Timer On (Circuit Breaker, Sourcing,
230
230
µA
IDRN = 0µA), VTMR = 2V
Timer On (Circuit Breaker, Sourcing,
630
630
µA
IDRN = 50µA), VTMR = 2V
Timer Off (Circuit Breaker/
5.8
5.8
µA
Shutdown Cooling, Sinking),
VTMR = 2V
∆ITMRACC [(ITMR at IDRN = 50µA) – (ITMR at IDRN = 0µA)] Timer On (Circuit Breaker with
8
8
µA/µA
∆IDRN
∆IDRN
IDRN = 50µA)
VDRNL
DRAIN Pin Voltage Low Threshold
For PWRGD Status (MS Only)
2.385
2.385
V
IDRNL
DRAIN Leakage Current
VDRAIN = 5V (4V for LTC4252A)
±0.1 ±1
±0.1
±1
µA
VDRNCL
DRAIN Pin Clamp Voltage
IDRN = 50µA7
6
V
VPGL
PWRGD Output Low Voltage
IPG = 1.6mA (MS Only)
0.2
0.4
0.2
0.4
V
IPG = 5mA (MS Only)
1.1
1.1
V
IPGH
PWRGD Pull-Up Current
VPWRGD = 0V (Sourcing) (MS Only)
40
58
80
40
58
80
µA
tSS
SS Default Ramp Period
SS pin floating, VSS ramps from
180
µs
0.2V to 2V
SS pin floating, VSS ramps from
230
µs
0.1V to 0.9V
tPLLUG
UV Low to Gate Low
0.4
0.4
µs
tPHLOG
OV High to Gate Low
0.4
0.4
µs
ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 2)
LTC4252-1/-2
LTC4252A-1/-2
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to VEE unless otherwise
specified.




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