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SN74ABT573ADBLE 数据表(PDF) 2 Page - Texas Instruments

部件名 SN74ABT573ADBLE
功能描述  OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUT
Download  24 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

SN74ABT573ADBLE 数据表(HTML) 2 Page - Texas Instruments

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SN54ABT573, SN74ABT573A
OCTAL TRANSPARENT DTYPE LATCHES
WITH 3STATE OUTPUTS
SCBS190F − JANUARY 1991 − REVISED SEPTEMBER 2003
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus
lines without need for interface or pullup components.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
terminal assignments
1234
A
1D
OE
VCC
1Q
B
3D
3Q
2D
2Q
C
5D
4D
5Q
4Q
D
7D
7Q
6D
6Q
E
GND
8D
LE
8Q
FUNCTION TABLE
(each latch)
INPUTS
OUTPUT
OE
LE
D
OUTPUT
Q
L
H
H
H
L
HL
L
L
LX
Q0
H
X
X
Z
logic diagram (positive logic)
OE
To Seven Other Channels
1
11
2
19
LE
1D
C1
1D
1Q
Pin numbers shown are for the DB, DW, FK, J, N, NS, PW, RGY, and W packages.
SN74ABT573A . . . GQN OR ZQN PACKAGE
(TOP VIEW)
1
234
A
B
C
D
E


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