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SN74ACT564DBRE4 数据表(PDF) 4 Page - Texas Instruments |
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SN74ACT564DBRE4 数据表(HTML) 4 Page - Texas Instruments |
4 / 15 page SN54ACT564, SN74ACT564 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SCAS549B – NOVEMBER 1995 – REVISED NOVEMBER 2002 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 timing requirements over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) TA = 25°C SN54ACT564 SN74ACT564 UNIT MIN MAX MIN MAX MIN MAX UNIT fclock Clock frequency 85 65 75 MHz tw Pulse duration, CLK high or low 3 5 3.5 ns tsu Setup time, data before CLK ↑ 2.5 3.5 3 ns th Hold time, data after CLK ↑ 1 2.5 1 ns switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM TO TA = 25°C SN54ACT564 SN74ACT564 UNIT PARAMETER (INPUT) (OUTPUT) MIN TYP MAX MIN MAX MIN MAX UNIT fmax 85 90 65 75 MHz tPLH CLK Q 2 6.5 10.5 1 12.5 1.5 11.5 ns tPHL CLK Q 1.5 6 9.5 1 11.5 1.5 10.5 ns tPZH OE Q 1.5 5.5 9 1 10.5 1.5 9.5 ns tPZL OE Q 1.5 5.5 8.5 1 10.5 1 9.5 ns tPHZ OE Q 1.5 7 10.5 1 12.5 1.5 11.5 ns tPLZ OE Q 1.5 5 8 1 9.5 1 8.5 ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS TYP UNIT Cpd Power dissipation capacitance CL = 50 pF, f = 1 MHz 50 pF PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. |
类似零件编号 - SN74ACT564DBRE4 |
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类似说明 - SN74ACT564DBRE4 |
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