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M58MR016C 数据表(PDF) 1 Page - STMicroelectronics |
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M58MR016C 数据表(HTML) 1 Page - STMicroelectronics |
1 / 51 page 1/51 PRELIMINARY DATA August 2002 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. M58MR016C M58MR016D 16 Mbit (1Mb x16, Mux I/O, Dual Bank, Burst) 1.8V Supply Flash Memory s SUPPLY VOLTAGE –VDD = VDDQ = 1.7V to 2.0V for Program, Erase and Read –VPP = 12V for fast Program (optional) s MULTIPLEXED ADDRESS/DATA s SYNCHRONOUS / ASYNCHRONOUS READ – Burst mode Read: 40MHz – Page mode Read (4 Words Page) – Random Access: 100ns s PROGRAMMING TIME – 10µs by Word typical – Two or four words programming option s MEMORY BLOCKS – Dual Bank Memory Array: 4/12 Mbit – Parameter Blocks (Top or Bottom location) s DUAL OPERATIONS – Read within one Bank while Program or Erase within the other – No delay between Read and Write operations s PROTECTION/SECURITY – All Blocks protected at Power-up – Any combination of Blocks can be protected – 64 bit unique device identifier – 64 bit user programmable OTP cells – One parameter block permanently lockable s COMMON FLASH INTERFACE (CFI) s 100,000 PROGRAM/ERASE CYCLES per BLOCK s ELECTRONIC SIGNATURE – Manufacturer Code: 20h – Top Device Code, M58MR016C: 88DEh – Bottom Device Code, M58MR016D: 88E0h FBGA TFBGA48 (ZC) 10 x 4 ball array Figure 1. Logic Diagram AI05228 4 A16-A19 W ADQ0-ADQ15 VDD M58MR016C M58MR016D E VSS 16 G RP WP VDDQ VPP L K WAIT BINV |
类似零件编号 - M58MR016C |
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类似说明 - M58MR016C |
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