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M27V402-180K5TR 数据表(PDF) 9 Page - STMicroelectronics

部件名 M27V402-180K5TR
功能描述  4 Mbit (512Kb x 8) Low Voltage OTP EPROM
Download  13 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M27V402-180K5TR 数据表(HTML) 9 Page - STMicroelectronics

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M27V405
Warning: compatibility with Flash Memory
Compatibility issues may arise when replacing the
compatible Single Supply 4 Mbit Flash Memory
(the M29F040) by the M27V405.
The VPP pin of the M27V405 corresponds to the
"W" pin of the M29F040. The M27V405 VPP pin
can withstand voltages up to 12.75V, while the "W"
pin of the M29F040 is a normal control signal input
and may be damaged if a high voltage is applied;
special precautions must be taken when program-
ming in-circuit.
However if an already programmed M27V405 is
used, this can be directly put in place of the Flash
Memory as the VPP input, when not in program-
ming mode, is set to VCC or VSS.
Changes to PRESTO II. The duration of the pro-
gramming pulse is reduced to 20µs, making the
programming time of the M27V405 comparable
with the counterpart Flash Memory.
Electronic Signature
The Electronic Signature (ES) mode allows the
reading out of a binary code from an OTP EPROM
that will identify its manufacturer and type. This
mode is intended for use by programming equip-
ment to automatically match the device to be pro-
grammed with its corresponding programming
algorithm. This mode is functional in the 25°C ±
5°C ambient temperature range that is required
when programming the M27V405. To activate the
ES mode, the programming equipment must force
11.5V to 12.5V on address line A9 of the M27V405
with VPP=VCC=5V. Two identifier bytes may then
be sequenced from the device outputs by toggling
address line A0 from VIL to VIH. All other address
lines must be held at VIL during Electronic Signa-
ture mode. Byte 0 (A0=VIL) represents the manu-
facturer code and byte 1 (A0=VIH) the device
identifier
code.
For
the
STMicroelectronics
M27V405, these two identifier bytes are given in
Table 4 and can be read-out on outputs Q0 to Q7.
Figure 7. Programming Flowchart
AI00760B
n = 0
Last
Addr
VERIFY
E = 100
µs Pulse
++n
= 25
++ Addr
VCC = 6.25V, VPP = 12.75V
FAIL
CHECK ALL BYTES
1st: VCC = 6V
2nd: VCC = 4.2V
YES
NO
YES
NO
YES
NO
Figure 8. On-Board Programming Flowchartt
AI01349
n = 0
Last
Addr
VERIFY
?
E = 10
µs Pulse
++n
= 25
++ Addr
VPP = 12.75V
FAIL
CHECK ALL BYTES
VPP = VCC
YES
NO
YES
NO
YES
NO
SET MARGIN MODE
E = 10
µs Pulse


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