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M27V320-150M1 数据表(PDF) 4 Page - STMicroelectronics |
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M27V320-150M1 数据表(HTML) 4 Page - STMicroelectronics |
4 / 15 page M27V320 4/15 The M27V320 has two control functions, both of which must be logically active in order to obtain data at the outputs. In addition the Word-wide or Byte-wide organisation must be selected. Chip Enable (E) is the power control and should be used for device selection. Output Enable (GVPP) is the output control and should be used to gate data to the output pins independent of device selection. Assuming that the addresses are stable, the ad- dress access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the output after a delay of tGLQV from the falling edge of GVPP, assuming that E has been low and the addresses have been stable for at least tAVQV- tGLQV. Standby Mode The M27V320 has standby mode which reduces the supply current from 50mA to 100µA. The M27V320 is placed in the standby mode by apply- ing a CMOS high signal to the E input. When in the standby mode, the outputs are in a high imped- ance state, independent of the GVPP input. Table 5. AC Measurement Conditions High Speed Standard Input Rise and Fall Times ≤ 10ns ≤ 20ns Input Pulse Voltages 0 to 3V 0.4V to 2.4V Input and Output Timing Ref. Voltages 1.5V 0.8V and 2V Figure 4. AC Testing Input Output Waveform AI01822 3V High Speed 0V 1.5V 2.4V Standard 0.4V 2.0V 0.8V Figure 5. AC Testing Load Circuit AI01823B 1.3V OUT CL CL = 30pF for High Speed CL = 100pF for Standard CL includes JIG capacitance 3.3k Ω 1N914 DEVICE UNDER TEST Table 6. Capacitance (1) (TA = 25 °C, f = 1 MHz) Note: 1. Sampled only, not 100% tested. Symbol Parameter Test Condition Min Max Unit CIN Input Capacitance VIN = 0V 10 pF COUT Output Capacitance VOUT = 0V 12 pF |
类似零件编号 - M27V320-150M1 |
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类似说明 - M27V320-150M1 |
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