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RD38F2030W0ZDQ0 数据表(PDF) 15 Page - Numonyx B.V |
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RD38F2030W0ZDQ0 数据表(HTML) 15 Page - Numonyx B.V |
15 / 46 page November 2007 Datasheet Order Number: 251407-13 15 32WQ and 64WQ Family with Asynchronous RAM R-UB# R-LB# Input RAM UPPER/ LOWER BYTE ENABLES: Low-true; During RAM reads, R-UB#-low enables the RAM high-order bytes on D[15:8], and R-LB#-low enables the RAM low-order bytes on D[7:0]. R-UB# and R-LB# are only available on SCSP combinations with either SRAM die or PSRAM die. F-WE# Input FLASH WRITE ENABLE: Low-true; WE# controls writes to the selected flash die. Address and data are latched on the rising edge of WE#. R-WE# Input RAM WRITE ENABLE: Low-true; R-WE# controls writes to the RAM die. R-WE# is only available on SCSP combinations with RAM die. F-WP# Input FLASH WRITE PROTECT: Low-true; WP# enables/disables the lock-down protection mechanism of the flash die. WP#-low enables the lock-down mechanism- locked down blocks cannot be unlocked with software commands. WP#-high disables the lock-down mechanism, allowing locked down blocks to be unlocked with software commands. F-RST# Input FLASH RESET: Low-true; RST#-low initializes flash internal circuitry and disables flash operations. RST#-high enables flash operation. Exit from reset places the flash in asynchronous read array mode. F-VPP F-VPEN Power FLASH PROGRAM/ ERASE POWER: A valid F-VPP voltage on this ball enables flash program/erase operations. Flash memory array contents cannot be altered when F-VPP(VPEN) < VPPLK(VPENLK). Erase/ program operations at invalid F-VPP(VPEN) voltages should not be attempted. Refer to the flash discrete product datasheet for additional details. F-VPEN (Erase/Program/Block Lock Enables) is not available for W18/W30 products. P-MODE Input PSRAM MODE: Low-true; P-MODE is used to enter/exit low power mode. Low power mode is not applicable to 38F2020W0ZTQ1, 38F2020W0ZBQ1, 38F2030W0YTQ1, 38F2030W0YBQ1, 38F2030W0ZTQ2, 38F2030W0ZBQ2, 38F1030W0ZTQ0, 38F1030W0ZBQ0. P-Mode is only available on SCSP combinations with PSRAM die. F[2:1]-VCC Power FLASH LOGIC POWER: F1-VCC supplies power to the core logic of flash die #1; F2-VCC supplies power to the core logic of flash die #2 and #3. Write operations are inhibited when F-VCC < VLKO. Device operations at invalid F-VCC voltages should not be attempted. F2-VCC is only available on SCSP combinations with two or three flash die, and is RFU on SCSP combinations with only one flash die. S-VCC Power SRAM Power Supply: Supplies power to the SRAM die. S-VCC is only available on SCSP combinations with SRAM die. P-VCC Power PSRAM Power Supply: Supplies power to the PSRAM die. P-VCC is only available on SCSP combinations with PSRAM die. VCCQ Power FLASH OUTPUT-BUFFER POWER: Supplies power for the I/O output buffers. VSS Power Ground: Connect to ground. Do not float any VSS connection. RFU — Reserved for Future Use: Reserve for future device functionality/ enhancements. DU — Don’t Use: Do not connect to any other signal, or power supply; must be left floating. Table 3: Signal Descriptions (Sheet 2 of 2) Symbol Type Name and Function |
类似零件编号 - RD38F2030W0ZDQ0 |
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类似说明 - RD38F2030W0ZDQ0 |
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