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IS42S16400 数据表(PDF) 4 Page - Integrated Silicon Solution, Inc

部件名 IS42S16400
功能描述  1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
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制造商  ISSI [Integrated Silicon Solution, Inc]
网页  http://www.issi.com
标志 ISSI - Integrated Silicon Solution, Inc

IS42S16400 数据表(HTML) 4 Page - Integrated Silicon Solution, Inc

  IS42S16400_08 Datasheet HTML 1Page - Integrated Silicon Solution, Inc IS42S16400_08 Datasheet HTML 2Page - Integrated Silicon Solution, Inc IS42S16400_08 Datasheet HTML 3Page - Integrated Silicon Solution, Inc IS42S16400_08 Datasheet HTML 4Page - Integrated Silicon Solution, Inc IS42S16400_08 Datasheet HTML 5Page - Integrated Silicon Solution, Inc IS42S16400_08 Datasheet HTML 6Page - Integrated Silicon Solution, Inc IS42S16400_08 Datasheet HTML 7Page - Integrated Silicon Solution, Inc IS42S16400_08 Datasheet HTML 8Page - Integrated Silicon Solution, Inc IS42S16400_08 Datasheet HTML 9Page - Integrated Silicon Solution, Inc Next Button
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Integrated Silicon Solution, Inc. — www.issi.com
Rev. D
01/30/08
IS42S16400
FUNCTION (InDetail)
A0-A11areaddressinputssampledduringtheACTIVE
(row-address A0-A11)andREAD/WRITEcommand(A0-A7
withA10definingautoPRECHARGE). A10 is sampled during
aPRECHARGEcommandtodetermineifallbanksareto
bePRECHARGED(A10 HIGH)orbankselectedbyBA0,
BA1(LOW).Theaddressinputsalsoprovidetheop-code
duringaLOADMODEREGISTERcommand.
BankSelectAddress(BA0andBA1) defines which bank
theACTIVE,READ,WRITEorPRECHARGEcommand
is being applied.
CAS
, in conjunction with the RAS and WE, forms the device
command.Seethe“CommandTruthTable”fordetailson
device commands.
TheCKEinputdetermineswhethertheCLKinputisen-
abled.ThenextrisingedgeoftheCLKsignalwillbevalid
whenisCKEHIGHandinvalidwhenLOW.WhenCKEis
LOW,thedevicewillbeineitherpower-downmode,CLOCK
SUSPENDmode,orSELF-REFRESHmode.CKEisan
asynchronous input.
CLKisthemasterclockinputforthisdevice.Exceptfor
CKE,allinputstothisdeviceareacquiredinsynchroniza-
tion with the rising edge of this pin.
TheCS input determines whether command input is en-
abled within the device. Command input is enabled when
CS
isLOW,anddisabledwithCS isHIGH.Thedevice
remains in the previous state when CS isHIGH.DQ0to
DQ15areDQpins.DQthroughthesepinscanbecontrolled
inbyteunitsusingtheLDQMandUDQMpins.
LDQMandUDQMcontrolthelowerandupperbytesof
theDQbuffers.Inreadmode,LDQMandUDQMcontrol
the output buffer. When LDQM or UDQM is LOW, the
corresponding buffer byte is enabled, and when HIGH,
disabled.TheoutputsgototheHIGHImpedanceState
whenLDQM/UDQMisHIGH.Thisfunctioncorresponds
to OE inconventionalDRAMs.Inwritemode,LDQMand
UDQMcontroltheinputbuffer.WhenLDQMorUDQMis
LOW,thecorrespondingbufferbyteisenabled,anddata
canbewrittentothedevice.WhenLDQMorUDQMis
HIGH, input data is masked and cannot be written to the
device.
RAS
, in conjunction with CAS and WE , forms the device
command.Seethe“CommandTruthTable”itemfordetails
on device commands.
WE
, in conjunction with RAS and CAS , forms the device
command.Seethe“CommandTruthTable”itemfordetails
on device commands.
VDDq is the output buffer power supply.
VDD is the device internal power supply.
GNDq is the output buffer ground.
GNDisthedeviceinternalground.
READ
TheREADcommandselectsthebankfromBA0,BA1inputs
and starts a burst read access to an active row. Inputs
A0-A7 provides the starting column location. When A10 is
HIGH,thiscommandfunctionsasanAUTOPRECHARGE
command. When the auto precharge is selected, the row
beingaccessedwillbeprechargedattheendoftheREAD
burst.Therowwillremainopenforsubsequentaccesses
when AUTO PRECHARGE is not selected.DQ’s read
dataissubjecttothelogiclevelontheDQMinputstwo
clocksearlier.WhenagivenDQMsignalwasregistered
HIGH,thecorrespondingDQ’swillbeHigh-Ztwoclocks
later.DQ’swillprovidevaliddatawhentheDQMsignal
wasregisteredLOW.
WRITE
A burst write access to an active row is initiated with the
WRITE command.BA0, BA1 inputs selects the bank,
and the starting column location is provided by inputs
A0-A7.Whether or not AUTO-PRECHARGE is used is
determined by A10.
Therowbeingaccessedwillbeprechargedattheendof
theWRITEburst,ifAUTOPRECHARGEisselected.If
AUTOPRECHARGEisnotselected,therowwillremain
open for subsequent accesses.
A memory array is written with corresponding input data
onDQ’sandDQMinputlogiclevelappearingatthesame
time.DatawillbewrittentomemorywhenDQMsignalis
LOW.WhenDQMisHIGH,thecorrespondingdatainputs
willbeignored,andaWRITEwillnotbeexecutedtothat
byte/column location.
PRECHARGE
The PRECHARGE command is used to deactivate the
open row in a particular bank or the open row in all banks.
BA0,BA1canbeusedtoselectwhichbankisprecharged
or they are treated as “Don’t Care”.A10 determined
whether one or all banks are precharged. After execut-
ing this command, the next command for the selected
banks(s) is executed after passage of the period t
RP, which
istheperiodrequiredforbankprecharging.Onceabank
has been precharged, it is in the idle state and must be
activatedpriortoanyREADorWRITEcommandsbeing
issued to that bank.
AUTO PRECHARGE
TheAUTOPRECHARGEfunctionensuresthatthepre-
charge is initiated at the earliest valid stage within a burst.
Thisfunctionallowsforindividual-bankprechargewithout
requiringanexplicitcommand.A10toenablestheAUTO
PRECHARGEfunctioninconjunctionwithaspecificREAD
orWRITEcommand.ForeachindividualREADorWRITE
command, auto precharge is either enabled or disabled.


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