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74LVC4245A 数据表(PDF) 3 Page - NXP Semiconductors |
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74LVC4245A 数据表(HTML) 3 Page - NXP Semiconductors |
3 / 17 page 74LVC4245A_6 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 06 — 18 January 2008 3 of 17 NXP Semiconductors 74LVC4245A Octal dual supply translating transceiver; 3-state 5. Pinning information 5.1 Pinning 5.2 Pin description (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig 3. Pin configuration SO24 and (T)SSOP24 Fig 4. Pin configuration DHVQFN24 74LVC4245A VCCA VCCB DIR VCCB A0 OE A1 B0 A2 B1 A3 B2 A4 B3 A5 B4 A6 B5 A7 B6 GND B7 GND GND 001aaa349 1 2 3 4 5 6 7 8 9 10 11 12 14 13 16 15 18 17 20 19 22 21 24 23 001aah087 74LVC4245A Transparent top view B7 A7 GND B6 GND(1) A6 B5 A5 B4 A4 B3 A3 B2 A2 B1 A1 B0 A0 OE DIR VCCB 11 14 10 15 9 16 8 17 7 18 6 19 5 20 4 21 3 22 2 23 terminal 1 index area Table 2. Pin description Symbol Pin Description VCCA 1 supply voltage (5 V bus) VCCB 23, 24 supply voltage (3 V bus) GND 11, 12, 13 ground (0 V) DIR 2 direction control A[0:7] 3, 4, 5, 6, 7, 8, 9, 10 data input or output B[0:7] 21, 20, 19, 18, 17, 16, 15, 14 data input or output OE 22 output enable input (active LOW) |
类似零件编号 - 74LVC4245A |
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类似说明 - 74LVC4245A |
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