数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ADF4360-8BCP 数据表(PDF) 11 Page - Analog Devices

部件名 ADF4360-8BCP
功能描述  Integrated Synthesizer and VCO
Download  24 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADF4360-8BCP 数据表(HTML) 11 Page - Analog Devices

Back Button ADF4360-8BCP Datasheet HTML 7Page - Analog Devices ADF4360-8BCP Datasheet HTML 8Page - Analog Devices ADF4360-8BCP Datasheet HTML 9Page - Analog Devices ADF4360-8BCP Datasheet HTML 10Page - Analog Devices ADF4360-8BCP Datasheet HTML 11Page - Analog Devices ADF4360-8BCP Datasheet HTML 12Page - Analog Devices ADF4360-8BCP Datasheet HTML 13Page - Analog Devices ADF4360-8BCP Datasheet HTML 14Page - Analog Devices ADF4360-8BCP Datasheet HTML 15Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 11 / 24 page
background image
ADF4360-8
Rev. A | Page 11 of 24
Lock Detect
MUXOUT can be programmed for one type of lock detect.
Digital lock detect is active high. When LDP in the R counter
latch is set to 0, digital lock detect is set high when the phase error
on three consecutive phase detector cycles is less than 15 ns.
With LDP set to 1, five consecutive cycles of less than 15 ns
phase error are required to set the lock detect. It stays set high
until a phase error of greater than 25 ns is detected on any
subsequent PD cycle.
INPUT SHIFT REGISTER
The ADF4360 family’s digital section includes a 24-bit input
shift register, a 14-bit R counter, and an 18-bit N counter
comprised of a 5-bit A counter and a 13-bit B counter. Data is
clocked into the 24-bit shift register on each rising edge of CLK.
The data is clocked in MSB first. Data is transferred from the
shift register to one of four latches on the rising edge of LE. The
destination latch is determined by the state of the two control
bits (C2, C1) in the shift register. The two LSBs, DB1 and DB0,
are shown in Figure 2.
The truth table for these bits is shown in Table 5. Table 6 shows
a summary of how the latches are programmed. Note that the
test modes latch is used for factory testing and should not be
programmed by the user.
Table 5. C2 and C1 Truth Table
Control Bits
C2
C1
Data Latch
0
0
Control Latch
0
1
R Counter
1
0
N Counter (B)
1
1
Test Modes Latch
VCO
The VCO core in the ADF4360 family uses eight overlapping
bands, as shown in Figure 19, to allow a wide frequency range to
be covered without a large VCO sensitivity (KV) and resultant
poor phase noise and spurious performance.
The correct band is chosen automatically by the band select
logic at power-up or whenever the N counter latch is updated. It
is important that the correct write sequence be followed at
power-up. This sequence is
1.
R counter latch
2.
Control latch
3.
N counter latch
During band select, which takes five PFD cycles, the VCO VTUNE
is disconnected from the output of the loop filter and connected
to an internal reference voltage.
0
1.0
0.5
2.5
2.0
1.5
3.5
3.0
80
85
90
100
95
105
115
110
FREQUENCY (MHz)
Figure 19. Frequency vs. VTUNE, ADF4360-8, L1 and L2 = 270 nH
The R counter output is used as the clock for the band select
logic and should not exceed 1 MHz. A programmable divider is
provided at the R counter input to allow division by 1, 2, 4, or 8,
and is controlled by the BSC1 bit and the BSC2 bit in the R
counter latch. Where the required PFD frequency exceeds
1 MHz, the divide ratio should be set to allow enough time for
correct band selection.
After band selection, normal PLL action resumes. The value of
KV is determined by the value of inductors used (see the
Choosing the Correct Inductance Value section). The ADF4360
family contains linearization circuitry to minimize any variation
of the product of ICP and KV.
The operating current in the VCO core is programmable in four
steps: 2.5 mA, 5 mA, 7.5 mA, and 10 mA. This is controlled by
the PC1 bit and the PC2 bit in the control latch.


类似零件编号 - ADF4360-8BCP

制造商部件名数据表功能描述
logo
Analog Devices
ADF4360-8BCPZ AD-ADF4360-8BCPZ Datasheet
368Kb / 24P
   Integrated Synthesizer and VCO
ADF4360-8BCPZRL AD-ADF4360-8BCPZRL Datasheet
368Kb / 24P
   Integrated Synthesizer and VCO
ADF4360-8BCPZRL7 AD-ADF4360-8BCPZRL7 Datasheet
368Kb / 24P
   Integrated Synthesizer and VCO
More results

类似说明 - ADF4360-8BCP

制造商部件名数据表功能描述
logo
Analog Devices
ADF4360-0 AD-ADF4360-0 Datasheet
315Kb / 24P
   Integrated Synthesizer and VCO
REV. B
ADF4360-5 AD-ADF4360-5 Datasheet
480Kb / 24P
   Integrated Synthesizer and VCO
REV. A
ADF4360-7 AD-ADF4360-7 Datasheet
336Kb / 28P
   Integrated Synthesizer and VCO
REV. B
ADF4360-2 AD-ADF4360-2 Datasheet
336Kb / 20P
   Integrated Synthesizer and VCO
REV. B
ADF4360-8 AD-ADF4360-8_15 Datasheet
716Kb / 24P
   Integrated Synthesizer and VCO
REV. C
ADF4360-2 AD-ADF4360-2_15 Datasheet
589Kb / 24P
   Integrated Synthesizer and VCO
REV. C
ADF4360-1 AD-ADF4360-1_16 Datasheet
377Kb / 24P
   Integrated Synthesizer and VCO
ADF4360-4 AD-ADF4360-4_16 Datasheet
394Kb / 24P
   Integrated Synthesizer and VCO
ADF4360-6 AD-ADF4360-6_16 Datasheet
389Kb / 24P
   Integrated Synthesizer and VCO
ADF4360-0 AD-ADF4360-0_16 Datasheet
366Kb / 24P
   Integrated Synthesizer and VCO
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24


数据表 下载

Go To PDF Page


链接网址




隐私政策
ALLDATASHEETCN.COM
ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com