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74VHC32M 数据表(PDF) 1 Page - STMicroelectronics

部件名 74VHC32M
功能描述  QUAD 2-INPUT OR GATE
Download  7 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

74VHC32M 数据表(HTML) 1 Page - STMicroelectronics

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74VHC32
QUAD 2-INPUT OR GATE
PRELIMINARY DATA
®
June 1999
s
HIGH SPEED: tPD = 3.8 ns (TYP.) at VCC =5V
s
LOW POWER DISSIPATION:
ICC =2
µA (MAX.) at TA =25 oC
s
HIGH NOISE IMMUNITY:
VNIH =VNIL =28% VCC (MIN.)
s
POWER DOWN PROTECTION ON INPUTS
s
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH|=IOL = 8 mA (MIN)
s
BALANCED PROPAGATION DELAYS:
tPLH
≅ tPHL
s
OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 5.5V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 32
s
IMPROVED LATCH-UP IMMUNITY
s
LOW NOISE: VOLP = 0.8V (Max.)
DESCRIPTION
The 74VHC32 is an advanced high-speed CMOS
QUAD 2-INPUT OR GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2MOS technology.
The internal circuit is composed of 2 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs
and
outputs are
equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES :
74VHC32M
74VHC32T
M
(Micro Package)
T
(TSSOP Package)
1/7


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