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TC7WZ246FK 数据表(PDF) 4 Page - Toshiba Semiconductor

部件名 TC7WZ246FK
功能描述  CMOS Digital Integrated Circuit Silicon Monolithic Dual Bus Transceiver Buffer And Buffer (Open Drain Outputs)
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制造商  TOSHIBA [Toshiba Semiconductor]
网页  http://www.semicon.toshiba.co.jp/eng
标志 TOSHIBA - Toshiba Semiconductor

TC7WZ246FK 数据表(HTML) 4 Page - Toshiba Semiconductor

  TC7WZ246FK Datasheet HTML 1Page - Toshiba Semiconductor TC7WZ246FK Datasheet HTML 2Page - Toshiba Semiconductor TC7WZ246FK Datasheet HTML 3Page - Toshiba Semiconductor TC7WZ246FK Datasheet HTML 4Page - Toshiba Semiconductor TC7WZ246FK Datasheet HTML 5Page - Toshiba Semiconductor TC7WZ246FK Datasheet HTML 6Page - Toshiba Semiconductor TC7WZ246FK Datasheet HTML 7Page - Toshiba Semiconductor TC7WZ246FK Datasheet HTML 8Page - Toshiba Semiconductor  
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TC7WZ246FU/FK
2007-11-01
4
AC Characteristics (input: tr = tf = 3 ns)
Ta
= 25°C
Ta
= −40~85°C
Characteristics
Symbol
Test Condition
VCC (V)
Min
Typ.
Max
Min
Max
Unit
1.8
± 0.15
2.0
17.0
2.0
18.5
2.5
± 0.2
1.0
7.5
1.0
8.0
3.3
± 0.3
0.8
5.2
1.2
6.0
CL = 15 pF, RL = 1 MΩ
5.0
± 0.5
0.5
4.5
0.8
5.5
3.3
± 0.3
1.5
6.7
1.5
7.0
Propagation delay time
( Buffer output)
tpLH
tpHL
CL = 50 pF, RL = 500 Ω
5.0
± 0.5
0.8
5.0
0.8
5.3
ns
Output to output skew
tosLH
tosHL
(Note 5)
3.3
± 0.3
1.0
1.0
ns
1.8
± 0.15
1.8
9.5
1.8
10.5
2.5
± 0.2
1.2
5.8
1.2
6.4
3.3
± 0.3
0.8
5.0
0.8
5.3
3-state output Disable time
( Open drain output)
tpLZ
pLZ
CL = 50 pF, RL = 500 Ω
5.0
± 0.5
0.5
4.2
0.5
4.5
ns
Input capacitance
CIN
0
7
pF
Bus input capacitance
CI / 0
5.5
8
pF
Output capacitance
COUT
5.5
9
pF
3.3
29
Power dissipation
capacitance
CPD
(Note 6)
5.5
33
pF
2.5
± 0.2
7.5
9.0
3.3
± 0.3
7.0
8.2
Minimum set-up time
Sts
(Note 7)
5.0
± 0.5
6.5
7.4
ns
Note 5 :Parameter guaranteed by desigh.
tosLH = |tpLHm - tpLHn|, tosHL = |tpHLm - tpHLn|
Note 6 : CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr.) = CPD・VCC・fIN + ICC/2
Note 7 : Sts is the time which must be waited for an input signal when a bus signal direction is switched.


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