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TPD7101F 数据表(PDF) 4 Page - Toshiba Semiconductor

部件名 TPD7101F
功能描述  2 channel High-Side N-ch Power MOSFET Gate Driver
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制造商  TOSHIBA [Toshiba Semiconductor]
网页  http://www.semicon.toshiba.co.jp/eng
标志 TOSHIBA - Toshiba Semiconductor

TPD7101F 数据表(HTML) 4 Page - Toshiba Semiconductor

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TPD7101F
2006-10-31
4
Pin No.
Symbol
Pin Description
20
RlSref2
Overcurrent detection level setup pin for ch2: The voltage determined by the constant current set by
the resistor connected to the Rref pin and the resistance of an external resistor connected to the
RISref2 pin is referenced to detect overcurrent.
21
RlSref1
Overcurrent detection level setup pin for ch1: The voltage determined by the constant current set by
the resistor connected to the Rref pin and the resistance of an external resistor connected to the
RISref1 pin is referenced to detect overcurrent.
22
Rref
Resistor connection pin:
This resistor determines the constant current used for the overcurrent detection circuit. Connect 62k
Ω
(recommended) between this pin and GND.
23
VDD2
External power MOSFET drain voltage detection pin.
24
VDD1
Power supply pin: the internal device is protected when overvoltage is applied.
Absolute Maximum Ratings (Ta = 25°C)
Characteristics
Symbol
Rating
Unit
Power supply voltage
VDD
30
V
Input voltage
VIN
− 0.5 ~ 6
V
Diagnosis output current
IDIAG
2
mA
Power dissipation
PD
0.8
W
Operating temperature
Topr
− 40 ~ 110
°C
Storage temperature
Tstg
− 55 ~ 150
°C
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).


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