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74LV132PW 数据表(PDF) 6 Page - NXP Semiconductors |
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74LV132PW 数据表(HTML) 6 Page - NXP Semiconductors |
6 / 17 page 74LV132_4 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 04 — 12 November 2007 6 of 17 NXP Semiconductors 74LV132 Quad 2-input NAND Schmitt trigger 11. Dynamic characteristics [1] All typical values are measured at Tamb =25 °C. [2] tpd is the same as tPLH and tPHL. [3] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V). [4] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz, fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in V N = number of inputs switching Σ(C L × VCC 2 × f o) = sum of the outputs. 12. Waveforms Table 7. Dynamic characteristics GND = 0 V; For test circuit see Figure 7. Symbol Parameter Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max tpd propagation delay nA, nB to nY; see Figure 6 [2] VCC = 1.2 V - 65 - - - ns VCC = 2.0 V - 18 34 - 43 ns VCC = 2.7 V - 15 24 - 30 ns VCC = 3.0 V to 3.6 V; CL =15pF [3] -10 - - - ns VCC = 3.0 V to 3.6 V [3] - 12 20 - 25 ns VCC = 4.5 V to 5.5 V [3] - 9.0 14 - 17 ns CPD power dissipation capacitance CL = 50 pF; fi = 1 MHz; VI = GND to VCC [4] -24 - - - pF Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. The input (nA, nB) to output (nY) propagation delays 001aaa662 tPHL tPLH VM VM nA, nB input nY output GND VI VOH VOL |
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类似说明 - 74LV132PW |
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