REV. D

AD844

–8–

Table I.

Gain

R1

R2

BW (MHz)

GBW (MHz)

–1

1 k

Ω

1 k

Ω

35

35

–1

500

Ω

500

Ω

60

60

–2

2 k

Ω

1 k

Ω

15

30

–2

1 k

Ω

500

Ω

30

60

–5

5 k

Ω

1 k

Ω

5.2

26

–5

500

Ω

100

Ω

49

245

–10

1 k

Ω

100

Ω

23

230

–10

500

Ω

50

Ω

33

330

–20

1 k

Ω

50

Ω

21

420

–100

5 k

Ω

50

Ω

3.2

320

+100

5 k

Ω

50

Ω

9

900

Response as an I-V Converter

The AD844 works well as the active element in an operational

current to voltage converter, used in conjunction with an exter-

nal scaling resistor, R1, in Figure 3. This analysis includes the

high speed DAC. Using a conventional op amp, this capacitance

forms a “nuisance pole” with R1 which destabilizes the closed

loop response of the system. Most op amps are internally com-

pensated for the fastest response at unity gain, so the pole due

system. For example, if R1 were 2.5 k

place this pole at a frequency of about 4 MHz, well within the

response range of even a medium speed operational amplifier.

In a current feedback amp this nuisance pole is no longer deter-

50

Ω for the AD844, the same 15 pF forms a pole 212 MHz

and causes little trouble. It can be shown that theresponse of

this system is:

V

KR1

(1

+ sTd )(1+ sTn)

where K is a factor very close to unity and represents the finite

dc gain of the amplifier, Td is the dominant pole and Tn is the

nuisance pole:

K

R

RR

t

t

=

+ 1

Using typical values of R1 = 1 k

Ω and R

Ω, K is 0.9997;

in other words, the “gain error” is only 0.03%. This is much less

than the scaling error of virtually all DACs and can be absorbed,

if necessary, by the trim needed in a precise system.

voltages, and consequently the effect of finite “gain” is negli-

gible unless high value feedback resistors are used. Since that

would result in slower response times than are possible, the

cant source of error.

R1

AD844

Figure 3. Current-to-Voltage Converter

Circuit Description of the AD844

A simplified schematic is shown in Figure 4. The AD844 differs

from a conventional op amp in that the signal inputs have

radically different impedance. The noninverting input (Pin 3)

presents the usual high impedance. The voltage on this input is

transferred to the inverting input (Pin 2) with a low offset

voltage, ensured by the close matching of like polarity transis-

tors operating under essentially identical bias conditions. Laser

trimming nulls the residual offset voltage, down to a few

tens of microvolts. The inverting input is the common emitter

node of a complementary pair of grounded base stages and

behaves as a current summing node. In an ideal current feed-

back op amp the input resistance would be zero. In the AD844

it is about 50

Ω.

A current applied to the inverting input is transferred to a

complementary pair of unity-gain current mirrors which deliver

the same current to an internal node (Pin 5) at which the full

output voltage is generated. The unity-gain complementary

voltage follower then buffers this voltage and provides the load

driving power. This buffer is designed to drive low impedance

loads such as terminated cables, and can deliver

±50 mA into a

50

Ω load while maintaining low distortion, even when operat-

ing at supply voltages of only

± 6 V. Current limiting (not

shown) ensures safe operation under short circuited conditions.

+IN

OUT

32

5

6

7

4

–IN

TZ

Figure 4. Simplified Schematic