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1OE

1CLK

1D1

To Seven Other Channels

1Q1

2OE

2CLK

2D1

2Q1

To Seven Other Channels

1

48

47

24

25

36

C1

1D

13

2

C1

1D

Pin numbers shown are for the DGG, DL, and WD packages.

Absolute Maximum Ratings

(1)

Recommended Operating Conditions

(1)

SN54LVTH162374

,, SN74LVTH162374

3.3-V ABT 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCBS262M – JULY 1993 – REVISED NOVEMBER 2006

LOGIC DIAGRAM (POSITIVE LOGIC)

over operating free-air temperature range (unless otherwise noted)

MIN

MAX

UNIT

Supply voltage range

–0.5

4.6

V

–0.5

7

V

–0.5

7

V

–0.5

V

Current into any output in the low state

30

mA

30

mA

Input clamp current

–50

mA

Output clamp current

–50

mA

DGG package

70

DL package

63

θ

JA

°C/W

GQL/ZQL package

42

GRD/ZRD package

36

Storage temperature range

–65

150

°C

(1)

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating

conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

(3)

(4)

The package thermal impedance is calculated in accordance with JESD 51-7.

SN54LVTH162374

SN74LVTH162374

UNIT

MIN

MAX

MIN

MAX

Supply voltage

2.7

3.6

2.7

3.6

V

High-level input voltage

2

2

V

Low-level input voltage

0.8

0.8

V

Input voltage

5.5

5.5

V

High-level output current

–12

–12

mA

Low-level output current

12

12

mA

∆t/∆v

Input transition rise or fall rate

Outputs enabled

10

10

ns/V

∆t/∆V

CC

Power-up ramp rate

200

200

µs/V

Operating free-air temperature

–55

125

–40

85

°C

(1)

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

4

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