Rev. 1.5 10/05

Copyright © 2005 by Silicon Laboratories

Si5013

Si5013

Features

Applications

Description

The Si5013 is a fully-integrated, high-performance limiting amplifier (LA)

and clock and data recovery (CDR) IC for high-speed serial

communication systems. It derives timing information and data from a

serial input at OC-12/3 and STM-4/1 rates. Use of an external reference

sensitive noise entry points, thus making the PLL less susceptible to

board-level interaction and helping to ensure optimal jitter performance.

The Si5013 represents a new standard in low jitter, low power, small size,

and integration for high-speed LA/CDRs. It operates from a 3.3 V supply

over the industrial temperature range (–40 to 85 °C).

Functional Block Diagram

Supports OC-12/3, STM-4/1

Small footprint: 5 x 5 mm

Reference and reference-less

operation supported

Loss-of-signal level alarm

Data slicing level control

3.3 V supply

SONET/SDH/ATM routers

Add/drop multiplexers

Digital cross connects

Board level serial links

SONET/SDH test equipment

Optical transceiver modules

SONET/SDH regenerators

Limiting

Amp

DSPLL

Lock

Detection

Retimer

Reset/

Calibration

Bias Gen.

BUF

BUF

CLKOUT+

CLKOUT–

DIN+

DIN–

REFCLK+

REFCLK–

(Optional)

LOS

LOL

REXT

RESET/CAL

SLICE_LVL

DSQLCH

CLK_DSBL

LTR

RATESEL

Signal

Detect

LOS_LVL

BER_LVL

BER

Monitor

DOUT+

DOUT–

2

2

2

2

BER_ALM

Ordering Information:

See page 22.

Pin Assignments

Si5013

GND

Pad

1

2

3

4

5

GND

LOS_LVL

REFCLK+

RATESEL

SLICE_LVL

6

7

LOL

REFCLK–

21

20

19

18

17

REXT

RESET/CAL

DOUT+

VDD

VDD

16

15 TDI

DOUT–

8

9 10 11 12 13 14

28 27 26 25 24 23 22