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TDA9178T 数据表(PDF) 7 Page - NXP Semiconductors |
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TDA9178T 数据表(HTML) 7 Page - NXP Semiconductors |
7 / 36 page 1999 Sep 24 7 Philips Semiconductors Preliminary specification YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor TDA9178 The maximum and minimum gain of each segment is limited. Apart from the adaptive white-point stretching the black and white references are not affected by the non-linear processing. The amount of non-linearity can be controlled by the I2C-bus non-linearity DAC: bits NL5 to NL0. VARIABLE GAMMA On top of the histogram conversion a variable gamma function is applied for an alternative brightness control, or for factory adjustment. It is intended as an alternative for the DC-offset of the classic brightness user control. It maintains the black and white references. The gamma ranges from 0.5 to 1.5. The gamma can be set by the I2C-bus variable gamma DAC: bits VG5 to VG0. CUE FLASH In the present TV environment there is a lot of measured information like ambient light and noise. This information can be used to make an update of settings of the several algorithms after a picture has changed. The cue flash signal detects when a picture changes significantly. When the picture content has changed, the I2C-bus bit CF is set to logic 1 in the status register. After reading the status register, bit CF is reset to logic 0. On the output pin CF the cue flash information is present (active LOW) for only one line in the vertical retrace part. This pin is configured as an open drain output and therefore should be pulled up to the 5 V supply. Spectral processor In the spectral processor the luminance transfer is controlled by smart peaking, colour dependent sharpness and luminance transient improvement, defined by the sharpness improvement processor. The colour transfer is controlled by a colour transient improvement circuit; an additional output is available to provide a SCAVEM circuit. ADJUSTABLE CHROMINANCE DELAY The colour vector processor drives a delay line for correcting delay errors between the luminance input signal and the chrominance input signals (U and V). The chrominance delay can be adjusted in 6 steps of 12 ns (1fH) or 6 ns (2fH) by the I2C-bus bits CD2 to CD0. SHARPNESS IMPROVEMENT PROCESSOR The sharpness improvement processor increases the slope of large luminance transients of vertical objects and enhances transients of details in natural scenes by contour correction. It comprises three main processing units: the step improvement processor, the contour processor and the smart sharpness controller. Transient improvement processor The step improvement processor (see Fig.11) comprises two main functions: • MINMAX generator • MINMAX fader. The MINMAX generator utilizes all taps of an embedded luminance delay line to calculate the minimum and maximum envelope of all signals momentarily stored in the delay line. The MINMAX fader chooses between the minimum and maximum envelopes, depending on the polarity of a decision signal derived from the contour processor. Figures 12, 13 and 14 show some waveforms of the step improvement processor and illustrate that fast transients result with this algorithm. The MINMAX generator also outputs a signal that represents the momentary envelope of the luminance input signal. This envelope information is used by the smart sharpness controller. Line width control (also called aperture control) can be performed by I2C-bus line width DAC: bits LW5 to LW0. This control can be used to compensate for horizontal geometry errors caused by the gamma, for blooming of the spot of the CRT, or for compensating SCAVEM. Contour processor The contour processor comprises two contour generators with different frequency characteristics. The contour generator generates a second-order derivative of the incoming luminance signal which is supplied to the smart sharpness controller. In the smart sharpness controller, this signal is added to the properly delayed original luminance input signal, making up the peaking signal for detail enhancement. The peaking path features a low peaking frequency of 2 MHz (at 1fH), or a high peaking frequency of 3 MHz (at 1fH), selectable by I2C-bus bit CFS. The contour generators utilize three taps of the embedded luminance delay line. Figure 15 illustrates the normalized frequency transfer of the filter. |
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类似说明 - TDA9178T |
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