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TDA8758 数据表(PDF) 2 Page - NXP Semiconductors |
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TDA8758 数据表(HTML) 2 Page - NXP Semiconductors |
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2 / 24 page  1996 Feb 01 2 Philips Semiconductors Product specification YC 8-bit low-power analog-to-digital video interface TDA8758 FEATURES • Two 8-bit ADCs: – one Luminance or CVBS channel – one Chrominance channel • Sampling rate up to 32 MHz • Binary or two's complement 3-state TTL outputs for each channel • Internal reference voltage regulator • TTL-compatible digital inputs and outputs • Power dissipation of 530 mW (typical) • Input selector circuit (five selectable video inputs for CVBS or YC processing) • Peak white enable input • Clamp and Automatic Gain Control (AGC) functions for Y/CVBS channel (clamping on code 64 and Peak White level control at code 255) • Clamp function for C channel (code 128) • No sample-and-hold circuit required. APPLICATIONS • Video signal decoding • Digital picture processing • Frame grabbing • Multimedia with the Philips Desktop Video chip set (and especially SAA7196 multistandard decoder and scaler). GENERAL DESCRIPTION The TDA8758 is an 8-bit video high-speed low-power analog-to-digital conversion (ADC) interface for YC and CVBS signal processing. It converts 1-of-3 CVBS input signals or 1-of-2 YC input signals into binary or two’s complement words at a sampling rate of 32 MHz. All analog signal inputs are digitally clamped and an ADC interface is provided on the Y/CVBS channel. A fast precharge on clamp and AGC is provided for start-up. All digital inputs and outputs are TTL compatible. QUICK REFERENCE DATA ORDERING INFORMATION SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VCCA analog supply voltage 4.75 5.0 5.25 V VCCD digital supply voltage 4.75 5.0 5.25 V VCCO output stages supply voltage 4.75 5.0 5.25 V ICCA analog supply current − 59 70 mA ICCD digital supply current − 28 40 mA ICCO output supply current CL =15pF − 19 28 mA ILE DC integral linearity error −±0.75 ±1.5 LSB DLE DC differential linearity error −±0.4 ±1.0 LSB EB effective bits (from video input to digital outputs) fclk = 32 MHz; fi = 4.43 MHz − 7.1 − bits fclk(max) maximum clock frequency 30 32 − MHz B maximum −3 dB bandwidth (input preamplifier) full-scale; 0 dB gain − 15 − MHz αct crosstalk between Y and C channels and each video input −−63 −55 dB Ptot total power dissipation − 530 724 mW TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION TDA8758G LQFP48 plastic low profile quad flat package; 48 leads; body 7 × 7 × 1.4 mm SOT313-2 |
类似零件编号 - TDA8758 |
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类似说明 - TDA8758 |
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