© 2005 Microchip Technology Inc.

DS21949A-page 15

TC1303B

3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1:

PIN FUNCTION TABLE

3.1

LDO Shutdown Input Pin (SHDN2)

SHDN2 is a logic level input used to turn the LDO Reg-

ensure that the output is turned off.

3.2

provides the input voltage for the LDO regulator. An

additional capacitor can be added to lower the LDO

regulator input ripple voltage.

3.3

operation.

3.4

Power-Good Output Pin (PG)

within 94% of regulation. The PG output is configured

as a push-pull for the TC1303B.

3.5

physical layout information in Section 5.0 “Application

Circuits/Issues” for grounding recommendations.

3.6

Buck Regulator Output Sense Pin

For fixed-output voltage options, connect the output of

3.7

Buck Regulator Shutdown Input

Pin (SHDN1)

SHDN1 is a logic level input used to turn the buck

will ensure that the output is turned off.

3.8

Buck Regulator Input Voltage Pin

short as possible.

3.9

carries large signal-level current; all connections

should be made as short as possible.

3.10

These large-signal, level ground traces should have a

small loop area and length to prevent coupling of

switching noise to sensitive traces. Please see the

physical layout information supplied in Section 5.0

“Application

Circuits/Issues”

for

grounding

recommendations.

3.11

Exposed Pad (EP)

Pin No.

Name

Function

1

SHDN2

Active Low Shutdown Input for LDO Output Pin

Analog Input Supply Voltage Pin

LDO Output Voltage Pin

4

PG

Power-good Output Pin

Analog Ground Pin

7

SHDN1

Active Low Shutdown Input for Buck Regulator Output Pin

Buck Regulator Input Voltage Pin

Buck Inductor Output Pin

10

Power Ground Pin

EP

Exposed

Pad

For the DFN package, the center exposed pad is a thermal path to remove heat from the