© 2005 Microchip Technology Inc.

DS21412C-page 5

TC3403

2.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 2-1.

TABLE 2-1:

PIN FUNCTION TABLE

Pin No.

(16-Pin PDIP)

(16-Pin QSOP)

Symbol

Description

1

IN1+

Analog Input. This is the positive terminal of a true differential input with the negative input

tied internally to GND. See Section 1.0, Electrical Characteristics.

2

IN2+

Analog Input. This is the positive terminal of a true differential input with the negative input

tied internally to GND. See Section 1.0, Electrical Characteristics.

3

IN3+

Analog Input. This is the positive terminal of a true differential input with the negative input

tied internally to GND. See Section 1.0, Electrical Characteristics.

4

IN4+

Analog Input. This is the positive terminal of a true differential input with the negative input

tied internally to GND. See Section 1.0, Electrical Characteristics.

5

PFI

Analog Input. This is the positive input to an internal comparator used as a threshold detector.

The negative input is tied to an internal reference.

Analog Input. This is the positive input to the internal comparator used to monitor the voltage

reference, the reset generator drives RESET low. See Section 1.0, Electrical Characteristics.

Analog Input. The converter’s reference voltage is the differential between this pin and ground

8

GND

Ground Terminal.

Analog Output. The internal reference connects to this pin. It may be scaled externally and

connecting external circuitry to this pin. This pin is in a high impedance state during Sleep

mode.

10

SDAT

Digital Output (push-pull). This is the microPort™ serial data output. SDAT is driven low while

the TC3403 is converting data, effectively providing a “busy” signal. After the conversion is

complete, every high to low transition on the SCLK pin puts a bit from the resulting data word

on the SDAT pin (from MSB to LSB).

11

PFO

Digital Output (open drain). This is the output of the internal threshold detector.

When PFI is less than the internal reference, PFO is driven low.

12

RESET

driven low when a Power-on Reset or Brown-out condition is detected.

See Section 1.0, AC Electrical Characteristics.

13

A1

Digital Input. Controls analog multiplexer in conjunction with A0 to select one of the four Input

channels. This address is latched at the falling edge of the SCLK, which starts an A/D

conversion. A1, A0 = 00 = Input 1; 01 = Input 2; 10 = Input 3; 11 = Input 4.

14

A0

Digital Input. Controls analog multiplexer in conjunction with A1 to select one of four Input

channels. This address is latched at the falling edge of the SCLK, which starts an A/D

conversion. A1, A0 = 00 = Input 1; 01 = Input 2; 10 = Input 3; 11 = Input 4.

15

SCLK

Digital Input. This is the microPort™ serial clock input. The TC3403 comes out of Sleep mode

and a conversion cycle begins when this pin is driven low. After the conversion starts, each

by one bit. When the conversion is complete, the data word can be shifted out on the SDAT

pin by clocking the SCLK pin.

16

Power Supply Input.