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TDA8042 数据表(PDF) 7 Page - NXP Semiconductors

部件名 TDA8042
功能描述  Quadrature demodulator
Download  16 Pages
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

TDA8042 数据表(HTML) 7 Page - NXP Semiconductors

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1997 Apr 11
7
Philips Semiconductors
Product specification
Quadrature demodulator
TDA8042M
Notes
1. The voltage gain control range (GVAGC) is defined as the DC voltage to be applied on pin 3 to get a signal level of
800 mV (peak-to-peak value) at I and Q outputs.
The lowest control voltage corresponds to the highest sensitivity and gain.
2. Vth is the level of voltage to be applied at pin 20 to get a current Idet of 0.5 mA at pin 1. This voltage depends on the
amplitude of the signal at I and Q outputs.
The AGC threshold voltage can be set by a resistive voltage divider connected at pin 20. Without the external
resistors Vth is set at a value close to 2.35 V.
3. The current Idet increases when the output level (at pins 4 and 9) increases above the value set by the adjustment of
Vth.
4. The phase error is defined as the phase quadrature imbalance between I and Q channels.
5. The gain error is defined as the phase quadrature imbalance between I and Q channels.
6. The tilt is defined as the difference between the maximum and the minimum channel gain measured in a frequency
band of
±30 MHz around fi(RF). The specified tilt is the maximum tilt value found in one of the I and Q channels.
Oscillator
fosc
oscillator frequency
note 9
175
325
MHz
∆fosc
frequency drift
note 10
−−
500
kHz
∆VCC = ±5%
−−
100
kHz
Nosc
oscillator phase noise
measured10 kHz
from fosc; note 11
−−
91
dBc/Hz
Vosc(dis)
oscillator disable voltage at pin 17
oscillator disabled
−−
1.0
V
oscillator enabled
4.0
−−
V
Prescaler
VOH
HIGH level output voltage
note 12
4.0
−−
V
VOL
LOW level output voltage
note 12
−−
3.35
V
δ
output duty cycle
40
50
60
%
DIVspu(IQ)
output spurious voltage at I and Q outputs
note 13
−−50
dB
I and Q internal filters
B−1
bandwidth for 1 dB attenuation
30
−−
MHz
B−30
bandwidth for 30 dB attenuation
450
MHz
I and Q output amplifiers
VO(IQ)(DC)
I and Q channels DC output voltage
2.45
V
Vo(IQ)(p-p)
I and Q channels output voltage
(peak-to-peak value)
note 14
0.8
V
Vclip(p-p)
I and Q output clipping level
(peak-to-peak value)
1.8
V
RL(IQ)
I and Q channels output load resistance
note 15
500
−−Ω
Ro(IQ)
I and Q channels output resistance
67
−Ω
αct(I-Q)
crosstalk between I and Q channels
30
−−
dB
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT


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