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LTC2909ITS8-2.5 数据表(PDF) 13 Page - Linear Technology

部件名 LTC2909ITS8-2.5
功能描述  Precision Triple/Dual Input UV, OV and Negative Voltage Monitor
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LTC2909ITS8-2.5 数据表(HTML) 13 Page - Linear Technology

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LTC2909
13
2909fa
APPLICATIO S I FOR ATIO
If the user wishes to avoid having an external capacitor,
the TMR pin should be tied to ground, switching the part
to an internal 200ms timer.
If the user requires a shorter timeout than 400μs, or
wishes to perform application-specific processing of the
reset output, the part may be put in comparator mode by
tying the TMR pin to VCC. In comparator mode, the timer
is bypassed and comparator outputs go straight to the
reset output.
The current required to hold TMR at ground or VCC is
about 2μA. To force the pin from the floating state to
ground or VCC may require as much as 100μA during the
transition.
When the part is in comparator mode, one of the two
means of preventing false reset has been removed, so
a small amount of one-sided hysteresis is added to the
inputs to prevent oscillation as the monitored voltage
passes through the threshold. This hysteresis is such
that the valid-to-invalid transition threshold is unchanged,
but the invalid-to-valid threshold is moved by about
0.7%. Thus, when the ADJ input polarity is positive,
the threshold voltage is 500mV nominal when the in-
put is above 500mV. As soon as the input drops below
500mV, the threshold moves up to 503.5mV nominal.
Conversely, when configured as a negative-polarity input,
the threshold is 500mV when the input is below 500mV,
and switches to 496.5mV when the input goes above
500mV.
The comparator mode feature should be enabled by directly
shorting the TMR pin to the VCC pin. Connecting the pin to
any other voltage may have unpredictable results.
Selecting the Reset Timing Capacitor
Connecting a capacitor, CTMR, between the TMR pin and
ground sets the reset timeout, tRST. The following formula
approximates the value of capacitor needed for a particular
timeout:
CTMR = t⎯R⎯S⎯T • 110 [pF/ms]
Leaving the TMR pin open with no external capacitor
generates a reset timeout of approximately 400μs.
Maximum length of the reset timeout is limited by the
ability of the part to charge a large capacitor on start-up.
Initially, with a large (discharged) capacitor on the TMR
pin, the part will assume it is in internal timer mode (since
the pin voltage will be at ground). If the 2μA flowing out of
the TMR pin does not charge the capacitor to the ground-
sense threshold within the first 200ms after supplies
become good, the internal timer cycle will complete and
⎯R⎯S⎯T will go high too soon.
APPLICATIO S I FOR ATIO
Table 3. Suggested Resistor Values for 5% Monitoring
NOMINAL
VOLTAGE
5% UV
5% OV
5% UV and OV
RX1
RX2
RX1
RX2
RX4
RX5
RX6
24
232k
10.2M
102k
5.11M
82.5k
11.5k
4.12M
15
115k
3.09M
200k
6.19M
76.8k
10.7k
2.37M
12
49.9k
1.07M
102k
2.49M
76.8k
10.7k
1.87M
9
115k
1.82M
78.7k
1.43M
162k
22.6k
2.94M
5
137k
1.15M
137k
1.33M
76.8k
10.7k
732k
3.3
221k
1.15M
340k
2.05M
76.8k
10.7k
453k
2.5
115k
422k
51.1k
221k
137k
19.1k
576k
1.8
63.4k
150k
115k
324k
82.5k
11.5k
221k
1.5
59.0k
107k
137k
301k
76.8k
10.7k
158k
1.2
127k
158k
102k
158k
187k
26.1k
267k
1
200k
174k
100k
113k
107k
15.0k
105k
–5
133k
1.37M
118k
1.37M
174k
20.0k
2.00M
–9
97.6k
1.74M
115k
2.32M
182k
22.6k
3.65M
–12
107k
2.49M
40.2k
1.07M
40.2k
5.11k
1.07M
–15
107k
3.09M
309k
10.2M
309k
40.2k
10.2M
Trip points are nominal voltage ±6.5%.


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