Analog Integrated Circuit Device Data

Freescale Semiconductor

11

33395

FUNCTIONAL DESCRIPTION

FUNCTIONAL INTERNAL BLOCK DESCRIPTION

Figure 5). These gate drive outputs supply the peak currents

required to turn ON and hold ON the low-side MOSFETs, as

well as turn OFF the MOSFETs.

voltage exceeds that stated in the maximum rating section of

the data sheet. When this fuse blows, the device is

permanently disabled.

The +I

current sense comparator. In a typical application, these

would receive a a low-pass filtered voltage derived from a

current sense resistor placed in series with the ground return

of the three-phase output bridge. When triggered by the

comparator, the CL (current limit) bit of the internal error

register is set, and the output gate drive pairs (i.e., GDH1 and

GDL1, GDH2 and GDL2, GDH3 and GDL3), are controlled

such that current will cease flowing through the load (refer to

Table 5, Truth Table, page 12).

OVERTEMPERATURE AND OVERVOLTAGE

SHUTDOWN CIRCUITS

Internal monitoring is provided for both over temperature

conditions and over voltage conditions. When any of these

conditions presents itself to the IC, the corresponding

internally set bits of the error register are set, and the output

gate drive pairs (i.e., GDH1 and GDL1, GDH2 and GDL2,

GDH3 and GDL3), are controlled such that current will cease

flowing through the load (refer to Table 5).

LSE AND HSE INPUT CIRCUITS

The low-side enable input pins (LSE1, LSE2, LSE3) and

high-side enable input pins (HSE1, HSE2, HSE3) form the

input pairs (HSE1 and LSE1, HSE2 and LSE2, HSE3 and

LSE3) which set the logic states of the output gate drive pairs

(i.e., GDH1 and GDL1, GDH2 and GDL2, GDH3 and GDL3)

in accordance with the logic set forth in the Truth Table

(page 12). Typically these inputs are supplied from an MCU

or DSP to provide the phasing of the currents applied to a

brushless dc motor's stator coils via the output MOSFET

pairs.

PWM INPUT

The pulse width modulation input provides a single input

pin to accomplish PWM modulation of the output pairs in

accordance with the states of the Mode 0 and Mode 1 inputs

as set forth in the Truth Table (page 12).

MODE SELECTION INPUTS

The mode selection inputs (Mode 0 and Mode 1)

determine the PWM implementation of the output pairs in

accordance with the logic set forth in the Truth Table

(page 12). PWMing can thus be set to occur either on the

high-side MOSFETs or the low-side MOSFETs, or can be set

to occur on both the high-side and low-side MOSFETs as

"complementary chopping".

TEST PIN

This pin should be grounded or left floating (i.e., do not

connect it to the printed circuit board). It is used by the

automated test equipment to verify proper operation of the

internal overtemperature shut down circuitry. This pin is

susceptible to latch-up and therefore may cause erroneous

operation or device failure if connected to external circuitry.