数据搜索系统,热门电子元器件搜索
  Chinese▼

Delete All
ON OFF
ALLDATASHEETCN.COM

X  

预览 PDF Download HTML

EPF10K100B Datasheet(数据表) 1 Page - Altera Corporation

部件型号  EPF10K100B
说明  Embedded Programmable Logic Device
下载  1 Pages
Scroll/Zoom Zoom In 100% Zoom Out
制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation

EPF10K100B Datasheet(HTML) 1 Page - Altera Corporation

  EPF10K100B 数据表 HTML 1Page - Altera Corporation  
Zoom Inzoom in Zoom Outzoom out
 1 page
background image
Altera Corporation
1
EPF10K100B
Embedded Programmable
Logic Device
July 1998, ver. 1
Errata Sheet
A-ES-10K100B-1.0
Altera, EPF10K100B, MAX, MAX+PLUS, and MAX+PLUS II are trademarks and/or service marks of Altera
Corporation in the United States and other countries. Altera acknowledges the trademarks of other
organizations for their respective products or services mentioned in this document. Altera products are
protected under numerous U.S. and foreign patents and pending applications, maskwork rights, and
copyrights. Altera warrants performance of its semiconductor products to current specifications in accordance
with Altera’s standard warranty, but reserves the right to make changes to any products and services at any
time without notice. Altera assumes no responsibility or liability arising out of the application or use of any
information, product, or service described herein except as expressly agreed to in writing by
Altera Corporation. Altera customers are advised to obtain the latest version of device
specifications before relying on any published information and before placing orders for
products or services.
Copyright
© 1998 Altera Corporation. All rights reserved.
101 Innovation Drive
San Jose, CA 95134
(408) 544-7000
http://www.altera.com
Applications Hotline:
(800) 800-EPLD
Customer Marketing:
(408) 544-7104
Literature Services:
(888) 3-ALTERA
lit_req@altera.com
®
®
Preliminary
Information
This errata sheet provides updated information for Revision A and
Revision B EPF10K100B devices. The die revision is indicated by the third
digit of the nine-digit code on the top side of the device. Revision C and
higher EPF10K100B devices do not exhibit the conditions described in this
document.
Under certain voltage conditions, the output buffer delay for Revision A
and Revision B EPF10K100B devices is slower than the reported value for
I/O pins with the Slow Slew Rate option turned on in the MAX+PLUS® II
software. The MAX+PLUS II version 9.0 Timing Analyzer and Simulator
report an added output delay of 4.5 ns when the Slow Slew Rate option is
turned on. When the Slow Slew Rate option is turned on and the VCCINT
and VCCIO pins are powered at 2.3 V and 3.6 V, respectively, the change
in the measured output buffer delay due to the Slow Slew Rate option
may be as high as 7.5 ns.
This condition in which the VCCINT and VCCIO pins are powered to the
opposite extremes is rare. For designs where this increased delay is a
problem, you should either turn off the Slow Slew Rate option or adjust
the circuit’s power supply to provide a 2.5-V VCCINT.
With the Slow Slew Rate option turned off, the device functions as
reported in the MAX+PLUS II version 9.0 Timing Analyzer and
Simulator.




HTML 页

1 


数据表 下载

Go To PDF Page


链接网址


Privacy Policy
ALLDATASHEETCN.COM
ALLDATASHEET是否为您带来帮助?  [ DONATE ]  

关于 Alldatasheet    |   广告服务   |   联系我们   |   隐私政策   |   书签   |   链接交换   |   制造商名单
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  , Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp  |   Russian : Alldatasheetru.com
Korean : Alldatasheet.co.kr   |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com  |   Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl