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DSP56857E 数据表(PDF) 3 Page - Freescale Semiconductor, Inc |
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DSP56857E 数据表(HTML) 3 Page - Freescale Semiconductor, Inc |
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3 / 53 page  56857 Technical Data, Rev. 6 Freescale Semiconductor 3 56857 Block Diagram JTAG/ Enhanced OnCE Program Controller and Hardware Looping Unit Data ALU 16 x 16 + 36 Æ 36-Bit MAC Three 16-bit Input Registers Four 36-bit Accumulators Address Generation Unit Bit Manipulation Unit 16-Bit DSP56800E Core XTAL EXTAL Interrupt Controller Quad Timer or GPIOG 4 CLKO 4 RESET IRQA IRQB VDD VSSIO VDDA VSSA CS0-CS3[3:0] MODEA-C or 6 Program Memory 40,960 x 16 SRAM Boot ROM 1024 x 16 ROM Data Memory 24,576 x 16 SRAM PDB PDB XAB1 XAB2 XDB2 CDBR SPI or GPIOF 2 SCI or GPIOE IPBus Bridge (IPBB) 3 (GPIOH0-H2) 8 12 VDDIO 12 Decoding Peripherals 4 System Bus Control Memory PAB PAB CDBW CDBR CDBW VSS 5 6 ESSI0 or GPIOC 6 ESSI1 or GPIOD Host Interface or GPIOB 16 RSTO DMA 6 channel POR Integration Module System COP/ Watch- dog Time of Day Clock Generator OSC PLL 2 IPBus CLK COP/TOD CLK Core CLK used as GPIOA0-A3 GPIO Contol 56857 General Description • 120 MIPS at 120MHz • 40K x 16-bit Program SRAM • 24K x 16-bit Data SRAM • 1K x 16-bit Boot ROM • Six (6) independent channels of DMA • Two (2) Enhanced Synchronous Serial Interfaces (ESSI) • Two (2) Serial Communication Interfaces (SCI) • Serial Port Interface (SPI) • Four (4) dedicated GPIO • 8-bit Parallel Host Interface • General Purpose 16-bit Quad Timer • JTAG/Enhanced On-Chip Emulation (OnCE™) for unobtrusive, real-time debugging • Computer Operating Properly (COP)/Watchdog Timer • Time-of-Day (TOD) • 100 LQFP package •Up to 47 GPIO |
类似零件编号 - DSP56857E |
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类似说明 - DSP56857E |
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