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MCZ33879AEKR2 数据表(PDF) 11 Page - Freescale Semiconductor, Inc |
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MCZ33879AEKR2 数据表(HTML) 11 Page - Freescale Semiconductor, Inc |
11 / 24 page Analog Integrated Circuit Device Data Freescale Semiconductor 11 33879 ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS DIGITAL INTERFACE TIMING (14) Recommended Frequency of SPI Operation (14) fSPI – 4.0 – MHz Falling Edge of CS to Rising Edge of SCLK (Required Setup Time) tLEAD 100 – – ns Falling Edge of SCLK to Rising Edge of CS (Required Setup Time) tLAG 50 – – ns DI to Falling Edge of SCLK (Required Setup Time) tDI(SU) 16 – – ns Falling Edge of SCLK to DI (Required Hold Time) tDI(HOLD) 20 – – ns DI, CS, SCLK Signal Rise Time (15) t R(DI) – 5.0 – ns DI, CS, SCLK Signal Fall Time (15) t F(DI) – 5.0 – ns Time from Falling Edge of CS to DO Low Impedance (16) tDO(EN) – – 55 ns Time from Rising Edge of CS to DO High Impedance (17) tDO(DIS) – – 55 ns Time from Rising Edge of SCLK to DO Data Valid (18) tVALID – 25 55 ns Notes 14. This parameter is guaranteed by design. Production test equipment uses 4.16 MHz, 5.5 V/3.1 V SPI interface. 15. Rise and Fall time of incoming DI, CS, and SCLK signals suggested for design consideration to prevent the occurrence of double pulsing. 16. Time required for output status data to be available for use at DO pin. 17. Time required for output status data to be terminated at DO pin. 18. Time required to obtain valid data out from DO following the rise of SCLK. Table 5. Dynamic Electrical Characteristics (continued) Characteristics noted under conditions 3.1 V ≤ V DD ≤ 5.5 V, 5.5 V ≤ VPWR ≤ 18 V, -40°C ≤ TC ≤ 125°C unless otherwise noted. Where applicable, typical values reflect the parameter’s approximate average value with VPWR = 13 V, TA = 25°C. Characteristic Symbol Min Typ Max Unit |
类似零件编号 - MCZ33879AEKR2 |
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类似说明 - MCZ33879AEKR2 |
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