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P90CL301 数据表(PDF) 48 Page - NXP Semiconductors

部件名 P90CL301
功能描述  Low voltage 16-bit microcontroller
Download  92 Pages
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

P90CL301 数据表(HTML) 48 Page - NXP Semiconductors

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1996 Dec 11
48
Philips Semiconductors
Preliminary specification
Low voltage 16-bit microcontroller
P90CL301BFH (C100)
Table 68 CLK/SCL divide factor
Values greater than 100 kbits are outside the specified frequency range.
Table 69 I2C-bus serial clock rates
Values greater than 100 kbits are outside the specified frequency range.
Note to Tables 68 and 69
1. D = divisor = CLK
⁄
FCLK; see Table 15.
2AA
Assert Acknowledge When this bit is set, an acknowledge is returned after any one of
the following conditions:
• Slave address is received.
• The general call address is received (bit SADR.0 = 1).
• A data byte is received, while the device is programmed to be a master receiver.
• A data byte is received, while the device is a selected slave receiver.
When bit AA is reset, no acknowledgement is returned. Consequently, no interrupt is
requested when the own slave address or general call address is received.
CR2
CR1
CR0
CLK/SCL DIVIDE FACTOR
D=2(1)
D = 3
D = 4
D = 5
D=6
D=8
D=10
0
0
0
128
192
256
320
384
512
640
0
0
1
112
168
224
280
336
448
560
0
1
0
96
144
192
240
288
384
480
0
1
1
80
120
160
200
240
320
400
1
0
0
480
720
960
1200
1440
1920
2400
1
0
1
60
90
120
150
180
240
300
1
1
0
30
45
60
75
90
120
150
CR2
CR1
CR0
BIT FREQUENCY (kHz) AT CLK = 26 MHz
D=2(1)
D=3
D=4
D=5
D=6
D=8
D=10
000
−−
101
81
68
51
41
001
−−−
93
77
58
46
010
−−−−
90
68
54
011
−−−−−
81
65
1
0
0
54
36
27
22
18
13
10
101
−−−−−−
87
110
−−−−−−−
BIT
SYMBOL
DESCRIPTION


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