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74LVQ74_01 Datasheet(数据表) 4 Page - Fairchild Semiconductor |
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74LVQ74 Datasheet(HTML) 4 Page - Fairchild Semiconductor |
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4 page 
www.fairchildsemi.com 4 AC Electrical Characteristics Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design. AC Operating Requirements Capacitance Note 10: CPD is measured at 10 MHz. Symbol Parameter TA = +25°CTA = −40°C to +85°C Units VCC CL = 50 pF CL = 50 pF (V) Min Typ Max Min Max fMAX Maximum Clock 2.7 50 100 40 MHz Frequency 3.3 ± 0.3 100 125 95 tPLH Propagation Delay 2.7 3.5 9.6 16.9 3.5 19.0 ns CDn or SDn to Qn 3.3 ± 0.3 3.5 8.0 12.0 2.5 13.0 tPHL Propagation Delay 2.7 4.0 12.6 16.9 3.5 19.0 ns CDn or SDn to Qn 3.3 ± 0.3 4.0 10.5 12.0 3.5 13.5 tPLH Propagation Delay 2.7 4.5 9.6 19.0 4.0 23.0 ns CPn to Qn or Qn 3.3 ± 0.3 4.5 8.0 13.5 4.0 16.0 tPHL Propagation Delay 2.7 3.5 9.6 19.7 3.5 21.0 ns CPn to Qn or Qn 3.3 ± 0.3 3.5 8.0 14.0 3.5 14.5 tOSHL Output to Output Skew (Note 9) 2.7 1.0 1.5 1.5 ns tOSLH Data to Output 3.3 ± 0.3 1.0 1.5 1.5 Symbol Parameter TA = +25°CTA = −40°C to +85°C Units VCC CL = 50 pF CL = 50 pF (V) Typ Guaranteed Minimum tS Set-up Time, HIGH or LOW 2.7 1.8 5.0 6.5 ns 3.3 ± 0.3 1.5 4.0 4.5 tH Hold Time, HIGH or LOW 2.7 −2.4 0.5 0.5 ns Dn to CPn 3.3 ± 0.3 −2.0 0.5 0.5 tW Pulse Width 2.7 3.6 7.0 10.0 ns 3.3 ± 0.3 3.0 5.5 7.0 tREC Recovery Time 2.7 −3.0 0 0 ns 3.3 ± 0.3 −2.5 0 0 Symbol Parameter Typ Units Conditions CIN Input Capacitance 4.5 pF VCC = Open CPD (Note 10) Power Dissipation Capacitance 25 pF VCC = 3.3V |
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