CS82C84AZ datasheet(9/11 Pages) INTERSIL

部件名	CS82C84AZ

功能描述	CMOS Clock Generator Driver

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制造商	INTERSIL [Intersil Corporation]

网页	http://www.intersil.com/cda/home

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9 / 11 page

9

FN2974.3

December 6, 2005

AC Testing Input, Output Waveform

Test Load Circuits

NOTES:

1. CL =100pF for CLK output.

2. CL = 50pF for all outputs except CLK.

3. CL = Includes probe and jig capacitance.

FIGURE 5. TEST LOAD MEASUREMENT CONDITIONS

FIGURE 6. TCHCL, TCLCH LOAD CIRCUITS

FIGURE 7. TRYLCL, TRYHCH LOAD CIRCUITS

CL

OUTPUT FROM

DEVICE UNDER TEST

(SEE NOTE 3)

R = 740

Ω FOR ALL OUTPUTS

EXCEPT CLK

463

Ω FOR CLK OUTPUT

2.25V

C1

C2

X1

X2

CSYNC

CLK

LOAD

(SEE NOTE 1)

F/C

EF1

CSYNC

CLK

LOAD

(SEE NOTE 1)

F/C

VCC

PULSE

GENERATOR

C1

C2

X1

X2

CLK

LOAD

(SEE NOTE 1)

LOAD

(SEE NOTE 2)

CSYNC

F/C

AEN2

PULSE

GENERATOR

TRIGGER

VCC

24MHz

READY

OSC

AEN1

RDY2

EF1

CLK

LOAD

(SEE NOTE 1)

F/C

VCC

PULSE

GENERATOR

CSYNC

RDY2

AEN2

LOAD

(SEE NOTE 2)

AEN1

READY

TRIGGER

PULSE

GENERATOR

1.5V

VOL

VIL - 0.4V

INPUT

VIH + 0.4V

OUTPUT

VOH

NOTE: Input test signals must switch between VIL (maximum) -0.4V and VIH (minimum) +0.4V. RES and F/C must switch between 0.4V

and VCC -0.4V. Input rise and fall times driven at 1ns/V. VIL ≤ VIL (max) -0.4V for CSYNC pin. VCC -4.5V and 5.5V.

82C84A

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Renesas Technology Corp	CS82C84AZ	596Kb / 13P	CMOS Clock Generator Driver
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