数据搜索系统,热门电子元器件搜索
  Chinese▼

Delete All
ON OFF
ALLDATASHEETCN.COM

X  

预览 PDF Download HTML

SY89846U Datasheet(数据表) 3 Page - Micrel Semiconductor

部件型号  SY89846U
说明  1.5GHz Precision, LVPECL 1:5 Fanout with 2:1 MUX and Fail Safe Input with Internal Termination
下载  15 Pages
Scroll/Zoom Zoom In 100% Zoom Out
制造商  MICREL [Micrel Semiconductor]
网页  http://www.micrel.com
标志 

SY89846U Datasheet(HTML) 3 Page - Micrel Semiconductor

 
Zoom Inzoom in Zoom Outzoom out
 3 page
background image
Micrel, Inc.
SY89846U
March 2007
M9999-031307-A
hbwhelp@micrel.com or (408) 955-1690
3
Pin Description
Pin Number
Pin Name
Pin Function
1,8
VT0, VT1
Input Termination Center-Tap: Each side of a differential input pair terminates to
the VT pin. The VT pin provides a center-tap for each input (IN, /IN) to a
termination network for maximum interface flexibility. See “Input Interface
Applications” subsection.
2, 3
6, 7
IN0, /IN0
IN1, /IN1
Differential Inputs: These input pairs are the differential signal inputs to the
device. These inputs accept AC- or DC-coupled signals as small as 100mV. The
input pairs internally terminate to a VT pin through 50Ω. Each input has level
shifting resistors of 3.72kΩ to VCC. This allows a wide input voltage range from
VCC to GND. See Figure 3a, Simplified Differential Input Stage for details. Note
that these inputs will default to a valid (either HIGH or LOW) state if left open.
See “Input Interface Applications” subsection.
10, 11, 30, 31
GND,
Exposed Pad
Ground. Exposed pad must be connected to a ground plane that is the same
potential as the ground pins.
4
OE
Single-Ended Input: This TTL/CMOS input disables and enables the Q0-Q4
outputs. It is internally connected to a 25kΩ pull-up resistor and will default to a
logic HIGH state if left open. When disabled, Q goes LOW and /Q goes HIGH.
OE being synchronous, outputs will be enabled/disabled following a rising and a
falling edge of the input clock. VTH = VCC/2.
5
SEL
Single-Ended Input: This single-ended TTL/CMOS-compatible input selects the
inputs to the multiplexer. Note that this input is internally connected to a 25kΩ
pull-up resistor and will default to logic HIGH state if left open. VTH = VCC/2.
9, 32
VREF-AC1
VREF-AC0
Reference Voltage: These outputs bias to VCC–1.2V. They are used for AC-
coupling inputs IN and /IN. Connect VREF-AC directly to the corresponding VT
pin. Bypass with 0.01µF low ESR capacitor to VCC. Due to limited drive
capability, the VREF-AC pin is only intended to drive its respective VT pin.
Maximum sink/source current is ±0.5mA. See “Input Interface Applications”
subsection.
12, 13, 16, 19,
22, 25, 28, 29
VCC
Positive Power Supply: Bypass with 0.1µF||0.01µF low ESR capacitors as close
to the VCC pins as possible.
27, 26
24, 23
21, 20
18, 17
15, 14
Q0, /Q0
Q1, /Q1
Q2, /Q2
Q3, /Q3
Q4, /Q4
LVPECL Differential Output Pairs: Differential buffered output copies of the
selected input signal. The output swing is typically 800mV. Unused output pairs
may be left floating with no impact on jitter. See “LVPECL Output Termination”
subsection. Normally terminated with 50Ω to VCC-2V. These differential LVPECL
outputs are a logic function of the IN0, IN1, and SEL inputs. See “Truth Table”
below.
Truth Table
Inputs
Outputs
IN0
/IN0
IN1
/IN1
SEL
Q
/Q
0
1
X
X
0
0
1
1
0
X
X
0
1
0
X
X
0
1
1
0
1
X
X
1
0
1
1
0




HTML 页

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15 


数据表 下载




链接网址


Privacy Policy
ALLDATASHEETCN.COM
ALLDATASHEET是否为您带来帮助?  [ DONATE ]  

关于 Alldatasheet    |   广告服务   |   联系我们   |   隐私政策   |   书签   |   链接交换   |   制造商名单
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  , Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp  |   Russian : Alldatasheetru.com
Korean : Alldatasheet.co.kr   |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com  |   Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl