数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

SY89534L 数据表(PDF) 3 Page - Micrel Semiconductor

部件名 SY89534L
功能描述  3.3V, PRECISION, 33MHz to 500MHz PROGRAMMABLE LVPECL AND LVDS BUS CLOCK SYNTHESIZER
Download  15 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  MICREL [Micrel Semiconductor]
网页  http://www.micrel.com
标志 MICREL - Micrel Semiconductor

SY89534L 数据表(HTML) 3 Page - Micrel Semiconductor

  SY89534L Datasheet HTML 1Page - Micrel Semiconductor SY89534L Datasheet HTML 2Page - Micrel Semiconductor SY89534L Datasheet HTML 3Page - Micrel Semiconductor SY89534L Datasheet HTML 4Page - Micrel Semiconductor SY89534L Datasheet HTML 5Page - Micrel Semiconductor SY89534L Datasheet HTML 6Page - Micrel Semiconductor SY89534L Datasheet HTML 7Page - Micrel Semiconductor SY89534L Datasheet HTML 8Page - Micrel Semiconductor SY89534L Datasheet HTML 9Page - Micrel Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 15 page
background image
3
Precision Edge®
SY89534/35L
Micrel, Inc.
M9999-110405
hbwhelp@micrel.com or (408) 955-1690
PIN DESCRIPTION
Pin Number
Pin Name
Functional Description
4
VCO_SEL
LVTTL/CMOS Compatible Input: Selects between internal or external VCO. When
tied LOW (GND) internal VCO is selected. For external VCO, leave floating (default
condition is logic HIGH). Internal 25k
Ω pull-up.
5, 6
PSEL(1:0)
LVTTL/CMOS Compatible Input: Controls input frequency pre divider. Internal 25k
pull-up. Default is logic HIGH. See
“Pre-Divide Frequency Select” table.
7
LOOP REF
Analog Input/Output: Provides the reference voltage for PLL loop filter.
8
LOOP FILTER
Analog Input/Output: Provides the loop filter for PLL. See
“External Loop Filter
Considerations” for loop filter values.
13,14,15,16
M (3:0)
LVTTL/CMOS Compatible Input: Used to change the PLL (Phase-Lock Loop)
feedback divider. Internal 25k
Ω pull-up. (M0 = LSB). Default is logic HIGH.
See
“Feedback Divide Select” table.
22, 23, 24
FSEL_C (2:0)
LVTTL/CMOS Compatible Input: Bank C post divide select. Internal 25k
Ω pull-up.
Default is logic HIGH. See
“Post-Divide Frequency Select” table.
26, 27, 28
FSEL_B (2:0)
LVTTL/CMOS Compatible Input: Bank B post divide select. Internal 25k
Ω pull-up.
Default is logic HIGH. See
“Post-Divide Frequency Select” table.
56, 57, 58
FSEL_A (2:0)
LVTTL/CMOS Compatible Input: Bank A post divide select. Internal 25k
Ω pull-up.
Default is logic HIGH. See
“Post-Divide Frequency Select.” FSEL_A0 = LSB.
59
OUT_SYNC
Banks A,B,C output synchronous control: (LVTTL/CMOS compatible).
Internal 25k
Ω pull-up. After any bank has been programmed, toggle with a
HIGH-LOW-HIGH pulse to resynchronize all output banks.
Configuration
Pin Number
Pin Name
Functional Description
60, 61
V
CC_Logic
Power for Core Logic: Connect to 3.3V supply. 3.3V power pins are not internally
connected on the die, and must be connected together on the PCB.
62
V
CCA
Power for PLL: Connect to “quiet” 3.3V supply. 3.3V power pins are not internally
connected on the die, and must be connected together on the PCB.
55
V
CCOA
Power for Output Drivers: Connect all V
CCO pins to 3.3V supply. VCCO pins are not
30, 31, 50
V
CCOB
connected internally on the die.
21
V
CCOC
4, 9, 25, 63, 29
GND
Ground. All GND pins must be tied together on the PCB. Exposed pad must be
(exposed pad)
soldered to a ground plane.
Power
Pin Number
Pin Name
Functional Description
1, 2, 3
NC
No Connect: Leave floating.
10, 11
REFCLK, /REFCLK
Reference Input: This flexible input accepts any input TTL/CMOS, LVPECL, LVDS,
HSTL, SSTL. See
“Input Interface” section.
12
VBB_REF
Reference Output Voltage. Used for single-ended input. Maximum sink/source
current = 0.5mA.
51, 52, 53, 54
QA1 to QA0
Bank A 100k LVPECL Output Drivers: Output frequency is controlled by FSEL_A
(0:2). Terminate outputs with 50
Ω to V
CC –2V. See “Output Termination
Recommendations” section for termination detail.
32–49
QB8 to QB0
Bank B Output Drivers: SY89534: 100k LVPECL output drivers.
SY89535: Differential LVDS outputs. See
“Output Termination Recommendations”
section for termination detail. Output frequency is controlled by FSEL_B (0:2).
17, 18, 19, 20
QC1 to QC0
Bank C 100k LVPECL Output Drivers: Output frequency is controlled by
FSEL_C (0:2). Terminate outputs with 50
Ω to V
CC–2V. See “Output Termination
Recommendations” section.
64
NC
No Connect: Leave floating.
Input/Output


类似零件编号 - SY89534L

制造商部件名数据表功能描述
logo
Micrel Semiconductor
SY89534L MICREL-SY89534L Datasheet
154Kb / 16P
   3.3V, PRECISION, 33MHz to 500MHz PROGRAMMABLE LVPECL AND HSTL BUS CLOCK SYNTHESIZER
SY89534L MICREL-SY89534L Datasheet
187Kb / 15P
   3.3V, PRECISION, 33MHz to 500MHz PROGRAMMABLE LVPECL AND LVDS BUS CLOCK SYNTHESIZER
SY89534L MICREL-SY89534L Datasheet
103Kb / 16P
   3.3V, PRECISION, 33MHz to 500MHz PROGRAMMABLE LVPECL AND HSTL BUS CLOCK SYNTHESIZER
SY89534L MICREL-SY89534L Datasheet
111Kb / 15P
   3.3V, PRECISION, 33MHz to 500MHz PROGRAMMABLE LVPECL AND LVDS BUS CLOCK SYNTHESIZER
SY89534LHC MICREL-SY89534LHC Datasheet
111Kb / 15P
   3.3V, PRECISION, 33MHz to 500MHz PROGRAMMABLE LVPECL AND LVDS BUS CLOCK SYNTHESIZER
More results

类似说明 - SY89534L

制造商部件名数据表功能描述
logo
Micrel Semiconductor
SY89532L MICREL-SY89532L Datasheet
187Kb / 15P
   3.3V, PRECISION, 33MHz to 500MHz PROGRAMMABLE LVPECL AND LVDS BUS CLOCK SYNTHESIZER
SY89534L MICREL-SY89534L_08 Datasheet
111Kb / 15P
   3.3V, PRECISION, 33MHz to 500MHz PROGRAMMABLE LVPECL AND LVDS BUS CLOCK SYNTHESIZER
SY89532L MICREL-SY89532L_08 Datasheet
189Kb / 15P
   3.3V, PRECISION, 33MHz to 500MHz PROGRAMMABLE LVPECL AND LVDS BUS CLOCK SYNTHESIZER
SY89536L MICREL-SY89536L Datasheet
154Kb / 16P
   3.3V, PRECISION, 33MHz to 500MHz PROGRAMMABLE LVPECL AND HSTL BUS CLOCK SYNTHESIZER
SY89536L MICREL-SY89536L_05 Datasheet
103Kb / 16P
   3.3V, PRECISION, 33MHz to 500MHz PROGRAMMABLE LVPECL AND HSTL BUS CLOCK SYNTHESIZER
SY89536L MICREL-SY89536L_08 Datasheet
104Kb / 16P
   3.3V, PRECISION, 33MHz to 500MHz PROGRAMMABLE LVPECL AND HSTL BUS CLOCK SYNTHESIZER
SY89531L MICREL-SY89531L Datasheet
105Kb / 16P
   3.3V, PRECISION, 33MHz to 500MHz PROGRAMMABLE LVPECL AND HSTL BUS CLOCK SYNTHESIZER
SY89531L MICREL-SY89531L_08 Datasheet
111Kb / 16P
   3.3V, PRECISION, 33MHz to 500MHz PROGRAMMABLE LVPECL AND
SY89538L MICREL-SY89538L_08 Datasheet
636Kb / 23P
   3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer
SY89537L MICREL-SY89537L Datasheet
826Kb / 19P
   3.3V Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and Fanout Buffer
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15


数据表 下载

Go To PDF Page


链接网址




隐私政策
ALLDATASHEETCN.COM
ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com