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数据搜索系统，热门电子元器件搜索 |
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ATMEGA162V 数据表(PDF) 6 Page - ATMEL Corporation |
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ATMEGA162V 数据表(HTML) 6 Page - ATMEL Corporation |
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6 / 325 page  6 ATmega162/V 2513I–AVR–02/07 Port D (PD7..PD0) Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port D output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port D also serves the functions of various special features of the ATmega162 as listed on page 79. Port E(PE2..PE0) Port E is an 3-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port E output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port E pins that are externally pulled low will source current if the pull-up resistors are activated. The Port E pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port E also serves the functions of various special features of the ATmega162 as listed on page 82. RESET Reset input. A low level on this pin for longer than the minimum pulse length will gener- ate a Reset, even if the clock is not running. The minimum pulse length is given in Table 18 on page 49. Shorter pulses are not guaranteed to generate a reset. XTAL1 Input to the Inverting Oscillator amplifier and input to the internal clock operating circuit. XTAL2 Output from the Inverting Oscillator amplifier. |
类似零件编号 - ATMEGA162V_07 |
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类似说明 - ATMEGA162V_07 |
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