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NCP1280_05 Datasheet(数据表) 2 Page - ON Semiconductor |
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NCP1280 Datasheet(HTML) 2 Page - ON Semiconductor |
2 page ![]() NCP1280 http://onsemi.com 2 Figure 2. NCP1280 Functional Block Diagram + − + 5.0 V Reference Vin GND VEA Delay Logic OUT1 − + − + − + CS S R Q CSS 10 5 14 16 1 11 12 RD STOP STOP Vin Disable CCSKIP Clock Disable_ss S R Q Monotonic Start (250 ns) Disable_ss CAUX DIS VAUX VAUX OUT2 VAUX 15 13 VAUX 10 pF FF Ramp (Adjustable) * Trimmed during manufacturing to obtain 1.3 V with RT = 101 kW Vin RFF FF 4 + CURRENT MIRROR − + RT 2 V 10 pF I1 + − − 2 V 7 Oscillator Ramp 2 V + − DIS DIS 8 + − 2 V Max DC Comparator PWM Comparator + − Soft Start Comparator 0.5 V + − 0.6 V + − SS 9 One Shot Pulse − + 6 CSKIP 3.6 V 1.49 V 3 UV/OV − + 2 V + − One Shot Pulse + − + − I1 2 + − 1.3 V* VREF tD − 20 k W 40 k W VREF DCMAX 2 k W 32 k W 27 k W 5.3 k W 6.7 k W + VDC(inv) − RMDP RP CFF Disable_VREF Disable_VREF IFF Disable 11 mA + V − − + I + V 125 k W RT (600 ns) One Shot Pulse Clock VREF VREF Output Latch (Reset Dominant) Latch (Reset Dominant) ISTART VAUX(ON)/VAUX(OFF) 6 mA |