NBSG11_06 datasheet(9/12 Pages) ONSEMI

部件名	NBSG11

功能描述	2.5V/3.3V SiGe 1:2 Differential Clock Driver with RSECL Outputs

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制造商	ONSEMI [ON Semiconductor]

网页	http://www.onsemi.com

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NBSG11

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Table 9. AC CHARACTERISTICS for QFN−16 VCC = 0 V; VEE = −3.465 V to −2.375 V or VCC = 2.375 V to 3.465 V; VEE = 0 V

Symbol

Characteristic

−40

°C

25

°C

85

°C

Unit

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

fmax

Maximum Frequency

(See Figure 4. Fmax/JITTER) (Note 27)

10.5

12

10.5

12

10.5

12

GHz

tPLH,

tPHL

Propagation Delay to

Output Differential

90

125

160

90

125

160

90

125

160

ps

tSKEW

Duty Cycle Skew (Note 28)

Within−Device Skew (Note 29)

Device−to−Device Skew (Note 30)

3

6

25

15

50

3

6

25

15

50

3

6

25

15

50

ps

tJITTER

RMS Random Clock Jitter

fin < 10 GHz

Peak−to−Peak Data Dependent Jitter

fin < 10 Gb/s

0.2

TBD

1

0.2

TBD

1

0.2

TBD

1

ps

VINPP

Input Voltage Swing/Sensitivity

(Differential Configuration) (Note 31)

75

2600

75

2600

75

2600

mV

tr

tf

Output Rise/Fall Times

Q, Q

(20% − 80%) @ 1 GHz

15

30

55

20

30

55

20

30

55

ps

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

27. Measured using a 500 mV source, 50% duty cycle clock source. All loading with 50

W to VCC−2.0 V. For minimum fmax value of 10.5 GHz,

output amplitude is approximately 200 mV (as shown in Figure 4, where output P−P spec is shown as a minimum/guarantee of around

150 mV). Input edge rates 40 ps (20% − 80%).

28. See Figure 5. tSKEW = |tPLH − tPHL| for a nominal 50% Differential Clock Input Waveform.

29. Within−Device skew is defined as identical transitions on similar paths through a device.

30. Device−to−device skew for identical transitions at identical VCC levels.

31. VINPP (MAX) cannot exceed VCC − VEE.

0

100

200

300

400

500

600

12

34

56

78

9

10

11

12

INPUT FREQUENCY (GHz)

−0.5

0.5

1.5

2.5

3.5

4.5

5.5

6.5

7.5

8.5

9.5

Figure 4. Output Voltage Amplitude (VOUTPP) / RMS Jitter vs.

Input Frequency (fin) at Ambient Temperature (Typical)

OUTPUT AMP.

OUTPUT P−P SPEC

RMS JITTER

类似零件编号 - NBSG11_06

制造商	部件名	数据表	功能描述
ON Semiconductor	NBSG111	174Kb / 11P	2.5V/3.3V SiGe Differential 1:10 Clock/Data Driver with RSECL Outputs January, 2007 ??Rev. 8
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	NBSG111BAEVB	355Kb / 12P	Evaluation Board Manual for NBSG111 October, 2003 ??Rev. 0
	NBSG111BAR2	174Kb / 11P	2.5V/3.3V SiGe Differential 1:10 Clock/Data Driver with RSECL Outputs January, 2007 ??Rev. 8

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类似说明 - NBSG11_06

制造商	部件名	数据表	功能描述
ON Semiconductor	NBSG11	81Kb / 10P	2.5V/3.3V SiGe 1:2 Differential Clock Driver with RSECL* Outputs April, 2003 - Rev. 6
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