NB100LVEP56

http://onsemi.com

2

Table 1. PIN FUNCTION DESCRIPTION

Pin No.

Name

I/O

Default

State

Description

TSSOP

QFN

14,20

3,9,18,19,

20

−

−

Positive Supply Voltage. All VCC Pins must be Externally

Connected to Power Supply to Guarantee Proper Operation.

11

15,24

−

−

Negative Supply Voltage. All VEE Pins must be Externally

Connected to Power Supply to Guarantee Proper Operation.

3,8

6,12

−

−

ECL Reference Voltage Output

1

4

D0a

ECL Input

Low

Noninverted Differential Data a Input to MUX 0. Internal 75 kW to

2

5

D0a

ECL Input

High

4

7

D0b

ECL Input

Low

Noninverted Differential Data b Input to MUX 0. Internal 75 kW to

5

8

D0b

ECL Input

High

6

10

D1a

ECL Input

Low

Noninverted Differential Data a Input to MUX 1. Internal 75 kW to

7

11

D1a

ECL Input

High

9

13

D1b

ECL Input

Low

Noninverted Differential Data b Input to MUX 1. Internal 75 kW to

10

14

D1b

ECL Input

High

19

2

Q0

ECL Output

−

Noninverted Differential Output MUX 0. Typically Terminated with

18

1

Q0

ECL Output

−

Inverted Differential Output MUX 0. Typically Terminated with

13

17

Q1

ECL Output

−

Noninverted Differential Output MUX 1. Typically Terminated with

12

16

Q1

ECL Output

−

Inverted Differential Output MUX 1. Typically Terminated with

17

23

SEL0

ECL, CMOS

Input

Low

Noninverted Differential Select Input to MUX 0. Internal 75 W to

16

22

COM_SEL

ECL, CMOS

Input

Low

Noninverted Differential Common Select Input to Both MUX.

15

21

SEL1

ECL, CMOS

Input

Low

Noninverted Differential Select Input to MUX 1. Internal 75 W to

N/A

−

EP

−

Exposed Pad. (Note 1)

1. The thermally conductive exposed pad on the package bottom (see case drawing) must be attached to a heat sinking conduit.