© Semiconductor Components Industries, LLC, 2002

January, 2002 – Rev. 7

1

Publication Order Number:

MC10131/D

MC10131

Dual Type D Master-Slave

Flip-Flop

The MC10131 is a dual master–slave type D flip–flop.

holding the common clock in the low state and using the enable inputs

for the clocking function. If the common clock is to be used to clock

the flip–flop, the Clock Enable inputs must be in the low state. In this

case, the enable inputs perform the function of controlling the

common clock.

The output states of the flip–flop change on the positive transition of

the clock. A change in the information present at the data (D) input

will not affect the output information at any other time due to master

slave construction.

LOGIC DIAGRAM

S1 5

D1 7

R1 4

R2 13

D2 10

S2 12

Q1

Q1

Q2

Q2

2

3

14

15

DIP PIN ASSIGNMENT

Q1

Q1

R1

S1

D1

Q2

Q2

R2

S2

D2

16

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

Pin assignment is for Dual–in–Line Package.

For PLCC pin assignment, see the Pin Conversion Tables on page 18

of the ON Semiconductor MECL Data Book (DL122/D).

http://onsemi.com

Device

Package

Shipping

ORDERING INFORMATION

MC10131L

CDIP–16

25 Units / Rail

MC10131P

PDIP–16

25 Units / Rail

MC10131FN

PLCC–20

46 Units / Rail

MARKING

DIAGRAMS

1

16

A

= Assembly Location

WL = Wafer Lot

YY = Year

WW = Work Week

CDIP–16

L SUFFIX

CASE 620

MC10131L

AWLYYWW

PDIP–16

P SUFFIX

CASE 648

PLCC–20

FN SUFFIX

CASE 775

10131

AWLYYWW

1

1

16

MC10131P

AWLYYWW

CD

CLOCKED TRUTH TABLE

LX

HL

L

HH

H

high state.

RS

R–S TRUTH TABLE

LH

H

HL

L

H

H

N.D.

N.D. = Not Defined

LL