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CAT28C512TI-12T 数据表(PDF) 10 Page - Catalyst Semiconductor

部件名 CAT28C512TI-12T
功能描述  512K-Bit CMOS PARALLEL EEPROM
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制造商  CATALYST [Catalyst Semiconductor]
网页  http://www.catalyst-semiconductor.com
标志 CATALYST - Catalyst Semiconductor

CAT28C512TI-12T 数据表(HTML) 10 Page - Catalyst Semiconductor

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CAT28C512/513
10
Doc. No. 1007, Rev. F
To activate the software data protection, the device must
be sent three write commands to specific addresses with
specific data (Figure 9). This sequence of commands
(along with subsequent writes) must adhere to the page
write timing specifications (Figure 11). Once this is done,
all subsequent byte or page writes to the device must be
preceded by this same set of write commands. The data
protection mechanism is activated until a deactivate
sequence is issued regardless of power on/off transi-
tions. This gives the user added inadvertent write pro-
tection on power-up in addition to the hardware protec-
tion provided.
To allow the user the ability to program the device with
an EEPROM programmer (or for testing purposes) there
is a software command sequence for deactivating the
data protection. The six step algorithm (Figure 10) will
reset the internal protection circuitry, and the device will
return to standard operating mode (Figure 12 provides
reset timing). After the sixth byte of this reset sequence
has been issued, standard byte or page writing can
commence.
Figure 11. Software Data Protection Timing
Figure 12. Resetting Software Data Protection Timing
CE
WE
tWP
AA
5555
55
2AAA
A0
5555
DATA
ADDRESS
tBLC
tWC
BYTE OR
PAGE
WRITES
ENABLED
CE
WE
AA
5555
55
2AAA
DATA
ADDRESS
tWC
80
5555
AA
5555
55
2AAA
20
5555
SDP
RESET
DEVICE
UNPROTECTED


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