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MC100LVEL11DR2 数据表(PDF) 1 Page - ON Semiconductor

部件名 MC100LVEL11DR2
功能描述  3.3V ECL 1:2 Differential Fanout Buffer
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制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor

MC100LVEL11DR2 数据表(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2006
December, 2006 − Rev. 8
1
Publication Order Number:
MC100LVEL11/D
MC100LVEL11
3.3VECL 1:2
Differential Fanout Buffer
Description
The MC100LVEL11 is a differential 1:2 fanout buffer. The device is
functionally similar to the E111 device but with higher performance
capabilities. Having within-device skews and output transition times
significantly improved over the E111, the LVEL11 is ideally suited for
those applications which require the ultimate in AC performance.
The differential inputs of the LVEL11 employ clamping circuitry to
maintain stability under open input conditions. If the inputs are left open
(pulled to VEE) the Q outputs will go LOW.
Features
330 ps Propagation Delay
5 ps Skew Between Outputs
High Bandwidth Output Transitions
The 100 Series Contains Temperature Compensation
PECL Mode Operating Range: VCC = 3.0 V to 3.8 V
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = −3.0 V to −3.8 V
Internal Input Pulldown Resistors
Q Output will Default LOW with Inputs Open or at VEE
Pb−Free Packages are Available
1
2
3
4
5
6
7
8
D
VEE
VCC
Figure 1. Logic Diagram and Pinout Assignment
Q0
Q0
D
Q1
Q1
*For additional marking information, refer to
Application Note AND8002/D.
MARKING
DIAGRAMS*
KV11
ALYWG
G
SOIC−8
D SUFFIX
CASE 751
1
8
TSSOP−8
DT SUFFIX
CASE 948R
1
8
1
8
http://onsemi.com
KVL11
ALYW
G
1
8
DFN8
MN SUFFIX
CASE 506AA
14
(Note: Microdot may be in either location)
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
M = Date Code
G = Pb−Free Package
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION


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